From 0735bc33ebef97af1ade627c6a3687dd1727f273 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=89der=20F=2E=20Zulian?= <zulian@eit.uni-kl.de>
Date: Tue, 18 Oct 2016 22:17:58 +0200
Subject: [PATCH] New DDR3 address mapping files.

Matthias sent these files to me via e-mail (20161018).
---
 .../amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB.xml   | 25 +++++++++++++++++++
 .../amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB.xml   | 25 +++++++++++++++++++
 2 files changed, 50 insertions(+)
 create mode 100644 DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB.xml
 create mode 100644 DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB.xml

diff --git a/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB.xml b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB.xml
new file mode 100644
index 00000000..39d66692
--- /dev/null
+++ b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB.xml
@@ -0,0 +1,25 @@
+<!-- 
+DDR3 Example:
+1GB x64 DIMM with: 8 * 1 Gb x8 Devices (e.g. Micron MT41J128M8) with Page Size: 1KB
+
+Device Characteristics:
+
+Rows: 16 K [13:0]  -> 14 bit
+Bank: 8    [2:0]   -> 3  bit
+Cols: 1 K  [9:0]   -> 10 bit
+
+Due to the DIMM we have a Byte Offset Y
+       
+2 2 2 | 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1 
+9 8 7 | 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
+B B B | R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
+-->
+
+<addressmapping>
+    <channel from="128"  to="128"  /> <!-- only one channel -->
+    <bank    from="27"   to="29"   />
+    <row     from="13"   to="26"   />
+    <column  from="3"    to="12"   />
+    <bytes   from="0"    to="2"    />
+</addressmapping>
+
diff --git a/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB.xml b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB.xml
new file mode 100644
index 00000000..6f384970
--- /dev/null
+++ b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB.xml
@@ -0,0 +1,25 @@
+<!-- 
+DDR3 Example:
+2GB x64 DIMM with: 8 * 2 Gb x8 Devices (e.g. Micron MT41J256M8) with Page Size: 1KB
+
+Device Characteristics:
+
+Rows: 32 K [14:0]  -> 15 bit
+Bank: 8    [2:0]   -> 3  bit
+Cols: 1 K  [9:0]   -> 10 bit
+
+Due to the DIMM we have a Byte Offset Y
+       
+3 2 2 | 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1 
+0 9 8 | 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
+B B B | R R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
+-->
+
+<addressmapping>
+    <channel from="128"  to="128"  /> <!-- only one channel -->
+    <bank    from="28"   to="30"   />
+    <row     from="13"   to="27"   />
+    <column  from="3"    to="12"   />
+    <bytes   from="0"    to="2"    />
+</addressmapping>
+