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Added RFMPB

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This commit is contained in:
Matthias Jung
2021-08-31 12:39:55 +02:00
parent f452c8442f
commit 0349cca11e
10 changed files with 102 additions and 10 deletions
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10
DRAMSys/library/src/common/TlmRecorder.cpp
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@@ -131,8 +131,14 @@ void TlmRecorder::recordPhase(tlm_generic_payload &trans,
if (currentTransactionsInSystem[&trans].cmd == 'X')
{
if (phase == END_REFA || phase == END_RFMAB || phase == END_REFB || phase == END_REFSB
|| phase == END_PDNA || phase == END_PDNP || phase == END_SREF)
if (phase == END_REFA
|| phase == END_RFMAB
|| phase == END_REFB
|| phase == END_REFSB
|| phase == END_RFMSB
|| phase == END_PDNA
|| phase == END_PDNP
|| phase == END_SREF)
removeTransactionFromSystem(trans);
}
else

2
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
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@@ -238,7 +238,7 @@ sc_time MemSpecDDR5::getExecutionTime(Command command, const tlm_generic_payload
}
else if (command == Command::REFA || command == Command::RFMAB)
return tRFC_slr + shortCmdOffset;
else if (command == Command::REFSB)
else if (command == Command::REFSB || command == Command::RFMSB)
return tRFCsb_slr + shortCmdOffset;
else
{

2
DRAMSys/library/src/controller/BankMachine.cpp
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@@ -75,7 +75,7 @@ void BankMachine::updateState(Command command)
case Command::PDEA: case Command::PDEP: case Command::SREFEN:
sleeping = true;
break;
case Command::REFA: case Command::REFB: case Command::REFSB: case Command::RFMAB:
case Command::REFA: case Command::REFB: case Command::REFSB: case Command::RFMAB: case Command::RFMSB:
sleeping = false;
blocked = false;

2
DRAMSys/library/src/controller/Command.cpp
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@@ -183,7 +183,7 @@ bool Command::isBankCommand() const
bool Command::isGroupCommand() const
{
assert(type >= Command::NOP && type <= Command::SREFEX);
return (type >= Command::PRESB && type <= Command::REFSB);
return (type >= Command::PRESB && type <= Command::RFMSB);
}
bool Command::isRankCommand() const

24
DRAMSys/library/src/controller/checker/CheckerDDR5.cpp
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@@ -578,6 +578,18 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, tlm_generic_paylo
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFSBRD_dlr - cmdLengthDiff);
lastCommandStart = lastScheduledByCommandAndBankInGroup[Command::RFMSB][bankInGroup.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCsb_slr - cmdLengthDiff);
lastCommandStart = lastScheduledByCommandAndLogicalRank[Command::RFMSB][logicalRank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFSBRD_slr - cmdLengthDiff);
lastCommandStart = lastScheduledByCommandAndPhysicalRank[Command::RFMSB][physicalRank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tREFSBRD_dlr - cmdLengthDiff);
if (last4ActivatesLogical[logicalRank.ID()].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4ActivatesLogical[logicalRank.ID()].front()
+ memSpec->tFAW_slr - memSpec->longCmdOffset);
@@ -755,7 +767,7 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, tlm_generic_paylo
// REFSB tRFCsb_slr/dlr
// PRESB tRP
}
else if (command == Command::REFSB)
else if (command == Command::REFSB || command == Command::RFMSB)
{
lastCommandStart = lastScheduledByCommandAndBankInGroup[Command::ACT][bankInGroup.ID()];
if (lastCommandStart != sc_max_time())
@@ -824,6 +836,14 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, tlm_generic_paylo
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCsb_dlr);
lastCommandStart = lastScheduledByCommandAndLogicalRank[Command::RFMSB][logicalRank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCsb_slr);
lastCommandStart = lastScheduledByCommandAndPhysicalRank[Command::RFMSB][physicalRank.ID()];
if (lastCommandStart != sc_max_time())
earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCsb_dlr);
if (last4ActivatesLogical[logicalRank.ID()].size() >= 4)
earliestTimeToStart = std::max(earliestTimeToStart, last4ActivatesLogical[logicalRank.ID()].front()
+ memSpec->tFAW_slr - memSpec->shortCmdOffset);
@@ -889,7 +909,7 @@ void CheckerDDR5::insert(Command command, tlm_generic_payload *payload)
lastCommandOnBus = sc_time_stamp() + memSpec->getCommandLength(command) - memSpec->tCK;
if (command == Command::ACT || command == Command::REFSB)
if (command == Command::ACT || command == Command::REFSB || command == Command::RFMSB)
{
if (last4ActivatesLogical[logicalRank.ID()].size() == 4)
last4ActivatesLogical[logicalRank.ID()].pop();

3
DRAMSys/library/src/controller/refresh/RefreshManagerAllBank.cpp
View File

@@ -65,11 +65,12 @@ sc_time RefreshManagerAllBank::start()
timeToSchedule = sc_max_time();
nextCommand = Command::NOP;
// TODO nach unten ziehen, und in BM auslagern....
bool RFMRequired = false;
if(Configuration::getInstance().RFM == true) {
for(auto bm : bankMachinesOnRank) {
uint64_t threshold = Configuration::getInstance().memSpec->getRAAIMT() * Configuration::getInstance().memSpec->getRAAMMT();
uint64_t threshold = memSpec->getRAAIMT() * memSpec->getRAAMMT();
if(bm->getRFMCounter() >= threshold) {
RFMRequired = true;
break;

43
DRAMSys/library/src/controller/refresh/RefreshManagerSameBank.cpp
View File

@@ -206,7 +206,48 @@ sc_time RefreshManagerSameBank::start()
}
}
else
return timeForNextTrigger;
{
bool RFMRequired = false;
if (Configuration::getInstance().RFM == true)
{
for (auto bankIt = allBankMachines.begin(); bankIt != allBankMachines.end(); bankIt++)
{
for (auto bm : *bankIt)
{
uint64_t threshold = memSpec->getRAAIMT() * memSpec->getRAAMMT();
if (bm->getRFMCounter() >= threshold)
{
RFMRequired = true;
currentIterator = bankIt;
break;
}
}
}
}
if (RFMRequired)
{
nextCommand = Command::RFMSB;
for (auto it : *currentIterator)
{
if (it->getState() == BankMachine::State::Activated)
{
nextCommand = Command::PRESB;
break;
}
}
for (auto it : *currentIterator)
it->block();
timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, &refreshPayloads[currentIterator->front()->getBank().ID() % memSpec->banksPerGroup]);
return timeToSchedule;
}
else
{
return timeForNextTrigger;
}
}
}
void RefreshManagerSameBank::updateState(Command command)

21
DRAMSys/traceAnalyzer/businessObjects/phases/phase.h
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@@ -413,6 +413,27 @@ protected:
}
};
class RFMSB : public AUTO_REFRESH
{
public:
using AUTO_REFRESH::AUTO_REFRESH;
protected:
virtual QString Name() const override
{
return "RFMSB";
}
virtual Granularity getGranularity() const override
{
return Granularity::Groupwise;
}
virtual QColor getPhaseColor() const override
{
QColor phaseColor = QColor(Qt::darkRed);
phaseColor.setAlpha(130);
return phaseColor;
}
};
class PDNAB : public Phase
{
public:

3
DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp
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@@ -85,6 +85,9 @@ shared_ptr<Phase> PhaseFactory::CreatePhase(ID id, const QString &dbPhaseName,
else if (dbPhaseName == "REFSB")
return shared_ptr<Phase>(new REFSB(id, span, clk, trans,
{Timespan(span.Begin(), span.Begin() + clk * cl.REFSB)}, std::shared_ptr<Timespan>()));
else if (dbPhaseName == "RFMSB")
return shared_ptr<Phase>(new RFMSB(id, span, clk, trans,
{Timespan(span.Begin(), span.Begin() + clk * cl.RFMSB)}, std::shared_ptr<Timespan>()));
else if (dbPhaseName == "RD")
return shared_ptr<Phase>(new RD(id, span, clk, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.RD)},
std::shared_ptr<Timespan>(new Timespan(trans->spanOnDataStrobe))));

2
DRAMSys/traceAnalyzer/scripts/vcdExport.py
View File

@@ -88,7 +88,7 @@ class Granularity(enum.Enum):
Rankwise = 2
def getGranularity(phase):
if phase == "PRESB" or phase == "REFSB":
if phase == "PRESB" or phase == "REFSB" or phase == "RFMSB":
return Granularity.Groupwise
elif phase == "PREA" or phase == "REFA" or phase=="RFMAB" or phase == "PDNA" or phase == "PDNP" or phase == "SREF":
return Granularity.Rankwise