Conclude DRAM Basics

src/acronyms.tex

@@ -98,10 +98,6 @@
     short = DDR,
     long = double data rate,
 }
-\DeclareAcronym{ddr}{
-    short = DDR,
-    long = double data rate,
-}
 \DeclareAcronym{dimm}{
     short = DIMM,
     long = dual in-line memory module,

src/chapters/dram.tex

@@ -49,8 +49,8 @@ A \ac{dimm} may also consist of several independent \textit{ranks}, which are co
 
 Besides the data bus, the channel consists also of the \textit{command bus} and the \textit{address bus}.
 Over the command bus, the commands necessary to control memory are issued by the \textit{memory controller}, that sits in between the \ac{dram} and the \ac{mpsoc}.
-For example, to read data, the memory controller may first issue a \ac{pre} command to precharge the bitlines in a certain bank, followed by an \ac{act} command to load the contents of a row into the \acp{psa}, and finally a \ac{rd} command to move the data from the \acp{psa} to the \acp{ssa} where it can further be exposed to the data bus.
-The value on the address bus determines the row, column, bank and rank used during the respective commands, while it is the responsibility of the memory controllers to translate the \ac{mpsoc}-side address to the respective components in a process called \ac{am}.
+For example, to read data, the memory controller may first issue a \ac{pre} command to precharge the bitlines in a certain bank, followed by an \iac{act} command to load the contents of a row into the \acp{psa}, and finally a \ac{rd} command to move the data from the \acp{psa} to the \acp{ssa} where it can further be exposed to the data bus.
+The value on the address bus determines the row, column, bank and rank used during the respective commands, while it is the responsibility of the memory controller to translate the \ac{mpsoc}-side address to the respective components in a process called \ac{am}.
 \Ac{am} ensures that the number of \textit{row misses}, i.e., the need for precharging and activating another row, is minimized.
 % One particularly common \ac{am} scheme is called \textit{Bank Interleaving} \cite{jung2017a}, which maps the lower address bits to the columns, followed by the ranks and banks, and the highest bits to the rows.
 One particularly common \ac{am} scheme is called \textit{Bank Interleaving} \cite{jung2017a}, which is illustrated using an exemplary mapping in Figure \ref{img:bank_interleaving}.
@@ -77,22 +77,24 @@ Because banks can be controlled independently, one bank can be outputting the ne
 
 	\definecolor{verylightgray}{gray}{0.85}
 	\begin{bytefield}[bitwidth=4mm,bitheight=5mm]{32}
-	\bitheader[endianness=big]{0,2,3,12,13,16,17,31} \\
-	\bitbox{15}{Row}
-	\bitbox{4}{Bank}
-	\bitbox{10}{Column}
-	\bitbox{3}[bgcolor=verylightgray]{}
+		\bitheader[endianness=big]{0,2,3,12,13,16,17,31} \\
+		\bitbox{15}{Row}
+		\bitbox{4}{Bank}
+		\bitbox{10}{Column}
+		\bitbox{3}[bgcolor=verylightgray]{}
 	\end{bytefield}
-	
+
 	\caption[Exemplary address mapping scheme]{Exemplary address mapping scheme for an input address of size 32.}
 	\label{img:bank_interleaving}
 \end{figure}
 
-Besides \ac{dimm}-based \ac{dram}, which is mainly used in desktop workstations, there are also other \ac{dram} integrations such as ...
-% gibt dimms oder auch gddr
-% ODER auch hbm -> überleitung zu hbm
+% Besides \ac{dimm}-based \ac{dram}, which is mainly used in desktop workstations, there are also \ac{dram} subsystems such as device-based \ac{dram}, where the memory devices are soldered directly on the same \ac{pcb} as the \ac{mpsoc}, or 2.5D-integrated \ac{dram}, where several memory dies are stacked on top of each other and connected to the \ac{mpsoc} by a silicon interposer \cite{jung2017a}.
+In addition to \ac{dimm}-based \ac{dram}, which is mainly used in desktop workstations, there are alternative \ac{dram} subsystems.
+One of these is device-based \ac{dram}, where the memory devices are directly soldered onto the same \ac{pcb} as the \ac{mpsoc}.
+Another type is 2.5D-integrated \ac{dram}, where multiple memory dies are stacked on top of each other and connected to the \ac{mpsoc} by a silicon interposer \cite{jung2017a}.
+Such a 2.5D-integrated type, used in \acp{gpu} and \acp{tpu}, is \ac{hbm}, which will be introduced in greater detail in the following section.
 
-\subsection{High Bandwidth Memory}
+\subsection{\Acf{hbm}}
 \label{sec:hbm}
 
 % similar to ranks, pch ...