75 lines
1.5 KiB
VHDL
75 lines
1.5 KiB
VHDL
-- See the file "LICENSE" for the full license governing this code. --
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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USE ieee.numeric_std.all;
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USE work.lt16x32_global.all;
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USE work.wishbone.all;
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USE work.config.all;
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ENTITY wb_lcd IS
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generic(
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memaddr : generic_addr_type;
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addrmask : generic_mask_type
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);
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port(
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clk : IN std_logic;
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rst : IN std_logic;
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dataLCD : INOUT std_logic_vector(7 downto 0);
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enableLCD : OUT std_logic;
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rsLCD : OUT std_logic;
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rwLCD : OUT std_logic;
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wslvi : IN wb_slv_in_type;
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wslvo : OUT wb_slv_out_type
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);
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END ENTITY;
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ARCHITECTURE behav OF wb_lcd IS
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signal lcd_reg : std_logic_vector(10 downto 0);
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signal ack : std_logic;
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BEGIN
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process(clk)
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begin
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if clk'event and clk='1' then
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if rst = '1' then
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ack <= '0';
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lcd_reg <= (others => '0');
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else
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if wslvi.stb = '1' and wslvi.cyc = '1' then
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if wslvi.we = '1' then
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lcd_reg <= dec_wb_dat(wslvi.sel,wslvi.dat)(10 downto 0);
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end if;
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if ack = '0' then
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ack <= '1';
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else
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ack <= '0';
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end if;
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else
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ack <= '0';
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end if;
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end if;
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end if;
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end process;
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wslvo.dat(10 downto 0) <= lcd_reg when wslvi.adr(2) = '0'
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else "000" & dataLCD when wslvi.adr(2) = '1' and lcd_reg(8) = '1'
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else (others => '0');
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wslvo.dat(31 downto 11) <= (others=>'0');
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wslvo.wbcfg <= wb_membar(memaddr, addrmask);
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wslvo.ack <= ack;
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enableLCD <= lcd_reg(10);
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rsLCD <= lcd_reg(9);
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rwLCD <= lcd_reg(8);
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dataLCD <= lcd_reg(7 downto 0) when lcd_reg(8) = '0' else "ZZZZZZZZ";
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END ARCHITECTURE;
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