701 lines
22 KiB
VHDL
701 lines
22 KiB
VHDL
-- See the file "LICENSE" for the full license governing this code. --
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.lt16x32_global.all;
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package lt16x32_internal is
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-- PACKAGE CONFIGURATION
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-- execute branch delay slot. if set to true, the first operation behind
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-- any type of branch is executed. if set to false, stalls are inserted
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constant execute_branch_delay_slot : boolean := TRUE;
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-- register width
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constant reg_width : integer := 32;
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-- pc width (should be smaller or equal to register width)
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constant pc_width : integer := 32;
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-- CONSTANT DECLARATIONS (part 1)
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-- memory access width (must be 32 in all conditions)
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constant mem_width : integer := 32;
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-- 16bit nop
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constant nop16 : std_logic_vector(15 downto 0) := "0000000000000000";
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-- constants for register numbers are found below function declaration
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-- TYPE DEFINITIONS
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-- type register numbers
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subtype reg_number is unsigned(3 downto 0);
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-- type for data size
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type size_type is (
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-- 8 bit
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size_byte,
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-- 16 bit
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size_halfword,
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-- 32 bit
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size_word
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);
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-- type for ALU operation
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type alu_mode_type is (
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-- calculations
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-- perform an addition
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alu_add,
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-- perform a subtraction
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alu_sub,
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-- perform a binary and
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alu_and,
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-- perform a binary or
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alu_or,
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-- perform a binary xor
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alu_xor,
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-- perform a left shift
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alu_lsh,
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-- perform a right shift
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alu_rsh,
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-- comparisons
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-- compare for equal
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alu_cmp_eq,
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-- compare for not equal
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alu_cmp_neq,
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-- compare for greater than or equal
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alu_cmp_ge,
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-- compare for greater than
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alu_cmp_gg,
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-- compare for less then or equal
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alu_cmp_le,
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-- compare for less than
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alu_cmp_ll,
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-- always return true
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alu_cmp_true,
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-- always return false
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alu_cmp_false
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);
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-- type for mode of current instruction
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type instruction_mode_type is (
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-- instruction is normal 16bit instruction
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sel_normal16,
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-- instruction is normal 32bit instruction
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sel_normal32,
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-- instruction is call
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sel_call,
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-- instruction is trap
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sel_trap,
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-- instruction is branch (needed for optional branch delay)
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sel_branch,
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-- instruction is reti
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sel_reti,
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-- stall, insert nop without pc increment
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sel_stall
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);
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-- type for selecting mux input in decoder mux
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type dec_mux_control_type is (
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-- select 16bit decoder output
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sel_ir16,
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-- select 32bit decoder output
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sel_ir32,
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-- select shadow decoder output
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sel_irshadow
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);
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-- type for selecting which data is used for data memory write
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type memory_write_data_select_type is (
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-- use register value for data memory write
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sel_register_value,
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-- use memory read data or'ed with 0x80 for data memory write
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sel_dmemORx80
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);
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-- type for selecting from which address the data memory is read
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type memory_read_addr_select_type is (
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-- use value of register a as data memory read address
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sel_register_a,
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-- use value of register b as data memory read address
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sel_register_b,
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-- use ldr-address as data memory read address
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sel_ldr_address
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);
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-- type for selecting which register number is used to write to register file
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type register_write_number_select_type is (
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-- use register number a
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sel_register_a,
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-- use register number d
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sel_register_d,
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-- use link register
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sel_lr,
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-- use status register
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sel_sr
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);
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-- type for selecting which data is written to register file
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type register_write_data_select_type is (
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-- use data memory read value
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sel_memory,
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-- use alu result
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sel_alu_result,
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-- use immediate value
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sel_immediate
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);
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-- type for selecting which bit is written to trueth flag
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type tflag_write_data_select_type is (
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-- use the 7th bit of data read from data memory
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sel_dmem7,
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-- use alu compare result
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sel_alu
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);
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-- type for selecting which data is used as second alu input
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type alu_input_data_select_type is (
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-- use value of register b as second alu input
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sel_register_b,
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-- use immediate value as second alu input
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sel_imm
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);
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-- type for selecting the pc increment
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type pc_summand_select_type is (
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-- use normal command width
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sel_run,
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-- use immediate value
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sel_immediate,
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-- use value of register a
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sel_register_a
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);
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-- type for selecting the mode of the pc
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type pc_mode_select_type is (
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-- increment relative to old pc
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sel_relative,
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-- set pc to an absolute value
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sel_absolute
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);
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-- type for selecting the width of the current operation
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type instruction_width_type is (
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-- operation is 16 bit wide
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sel_16bit,
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-- operation is 32 bit wide
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sel_32bit
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);
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-- type for selecting if pc jump is conditional
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type pc_condition_type is (
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-- always perform the pc jump
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sel_unconditional,
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-- perform the pc jump only if trueth flag is set
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sel_true
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);
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-- RECORD DECLARATIONS
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-- type for signals from controlpath to PC
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type cp_pc is record
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-- select signal for the pc increment
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summand_select : pc_summand_select_type;
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-- select signal for the mode of the PC
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mode_select : pc_mode_select_type;
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-- width of current instruction
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instruction_width : instruction_width_type;
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end record;
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-- type for signals from datapath to PC
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type dp_pc is record
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-- immediate value for PC calculation
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immediate_value : signed(reg_width - 2 downto 0);
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-- register value for PC calculation
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register_value : signed(reg_width - 2 downto 0);
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end record;
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-- type for signals from decoder to PC
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type dec_pc is record
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-- stall signal, active high
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stall : std_logic;
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end record;
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-- type for signals from datapath to decoder
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type dp_dec is record
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-- current runtime priority
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runtime_priority : unsigned(irq_prio_width - 1 downto 0);
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end record;
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-- type for signals from decoder to instruction memory
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type dec_imem is record
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-- enable signal, active high
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en : std_logic;
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end record;
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-- type for signals from PC to datapath
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type pc_dp is record
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-- current PC value
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value : unsigned(pc_width - 1 downto 0);
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end record;
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-- type for signals from PC to instruction memory
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type pc_imem is record
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-- current PC value
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value : unsigned(pc_width - 1 downto 0);
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end record;
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-- type for signals from interrupt controller to decoder
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type irq_dec is record
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-- interrupt number of requested interrupt
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num : unsigned(irq_num_width - 1 downto 0);
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-- priority of requested interrupt (higher number means higher priority)
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priority : unsigned(irq_prio_width - 1 downto 0);
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-- request signal, active high
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req : std_logic;
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-- non maskable interrupt flag, active high
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nmi : std_logic;
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end record;
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-- type for signals from decoder to interrupt controller
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type dec_irq is record
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-- interrupt acknowledge, high if requested interrupt is processed
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ack : std_logic;
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-- number of interrupt requested by internal trap instruction
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trap_num : unsigned(irq_num_width - 1 downto 0);
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-- request signal for internal trap, active high
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trap_req : std_logic;
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end record;
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-- type for signals from decoder pre stage to decoder finite state machine
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type pre_fsm is record
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-- instruction bits, as from imem. For 16bit instructions only instruction(15 downto 0) is used.
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instruction : std_logic_vector(31 downto 0);
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-- mode of this instruction
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mode : instruction_mode_type;
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end record;
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-- type for signals from decoder finite state machine to decoder for 16bit instructions
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type fsm_dec16 is record
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-- 16bit instruction
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instruction : std_logic_vector(15 downto 0);
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end record;
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-- type for signals from decoder finite state machine to decoder for 32bit instructions
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type fsm_dec32 is record
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-- 32bit instruction
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instruction : std_logic_vector(31 downto 0);
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end record;
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-- type for signals from decoder finite state machine to decoder for shadow instructions
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type fsm_decshd is record
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-- shadow instruction
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instruction : std_logic_vector(31 downto 0);
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end record;
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-- type for signals from decoder finite state machine to decoder mux
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type fsm_decmux is record
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-- control signal of decoder mux
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mode : dec_mux_control_type;
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end record;
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-- type for signals from control path to decoder
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type cp_dec is record
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-- condition signal, high if given condition holds, always high if no condition given
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condition_holds : std_logic;
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end record;
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-- type for signals from control path to data path in first stage
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type cp_dp_s1 is record
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-- register number of register a (first read register)
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register_read_number_a : reg_number;
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-- register number of register b (second read register)
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register_read_number_b : reg_number;
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end record;
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-- type for signals from control path to datapath in second stage
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type cp_dp_s2 is record
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-- 8 bit immediate value
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immediate : signed(8 - 1 downto 0);
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-- control signal to select which address is used for data memory read
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memory_read_addr_select : memory_read_addr_select_type;
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-- control signal to select which data is used as second alu input
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alu_input_data_select : alu_input_data_select_type;
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-- mode of alu operation
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alu_mode : alu_mode_type;
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end record;
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-- type for signals from control path to datapath in third stage
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type cp_dp_s3 is record
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-- control signal to select which data is used for data memory write
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memory_write_data_select : memory_write_data_select_type;
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-- control signal to select which data is used for register file write
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register_write_data_select : register_write_data_select_type;
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-- register number of register that will be written to
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register_write_number : reg_number;
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-- enable write to register file, active high
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register_write_enable : std_logic;
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-- size of register write, standard size data
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register_write_size : size_type;
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-- enable tflag write, active high
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tflag_write_enable : std_logic;
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-- control signal, which data is used for tflag write
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tflag_write_data_select : tflag_write_data_select_type;
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-- enable ovffag write, active high
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ovfflag_write_enable : std_logic;
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end record;
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-- type for signals from control path to data memory
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type cp_dmem is record
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-- size of data memory read, standard size data
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read_size : size_type;
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-- enable data memory read, active high
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read_en : std_logic;
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-- size of data memory write, standard size data
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write_size : size_type;
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-- enable data memory write, active high
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write_en : std_logic;
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end record;
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-- type for signals from decoder to controlpath for first stage
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type dec_cp_s1 is record
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-- register number of register a (first read register)
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register_read_number_a : reg_number;
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-- register number of register b (second read register)
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register_read_number_b : reg_number;
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-- instruction width of current instruction
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instruction_width : instruction_width_type;
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end record;
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-- type for signals from decoder to controlpath for second stage
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type dec_cp_s2 is record
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-- these signals are forwarded to datapath
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-- 8 bit immediate value
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immediate : signed(8 - 1 downto 0);
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-- control signal to select which address is used for data memory read
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dmem_read_addr_select : memory_read_addr_select_type;
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-- control signal to select which data is used as second alu input
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alu_input_data_select : alu_input_data_select_type;
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-- mode of alu operation
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alu_mode : alu_mode_type;
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-- these signals are forwarded to dmem
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-- size of data memory read, standard size data
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dmem_read_size : size_type;
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-- enable data memory read, active high
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dmem_read_en : std_logic;
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-- these signals are modified in controlpath
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-- control signal to select which increment is used for pc calculation
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pc_summand_select : pc_summand_select_type;
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-- control signal to select the mode of the pc
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pc_mode_select : pc_mode_select_type;
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-- control signal to select conditionality of pc jump
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pc_condition : pc_condition_type;
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end record;
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-- type for signals from decoder to controlpath for third stage
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type dec_cp_s3 is record
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-- these signals are forwarded to datapath
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-- control signal to select which data is used for data memory write
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dmem_write_data_select : memory_write_data_select_type;
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-- control signal to select which data is used for register file write
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register_write_data_select : register_write_data_select_type;
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-- register number of register that will be written to
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register_write_number : reg_number;
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-- enable write to register file, active high
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register_write_enable : std_logic;
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-- size of register write, standard size data
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register_write_size : size_type;
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-- enable tflag write, active high
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tflag_write_enable : std_logic;
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-- control signal, which data is used for tflag write
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tflag_write_data_select : tflag_write_data_select_type;
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-- enable clfag write, active high
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ovfflag_write_enable : std_logic;
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-- these signals are forwarded to dmem
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-- size of data memory write, standard size data
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dmem_write_size : size_type;
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-- enable data memory write, active high
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dmem_write_en : std_logic;
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end record;
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-- type for signals from datapath to controlpath in second stage
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type dp_cp_s2 is record
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-- value of truth flag
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tflag : std_logic;
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end record;
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-- type for signals from datapath to data memory
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type dp_dmem is record
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-- data for data memory write access
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write_data : std_logic_vector(mem_width - 1 downto 0);
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-- address for data memory write access
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write_addr : std_logic_vector(mem_width - 1 downto 0);
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-- address for data memory read access
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read_addr : std_logic_vector(mem_width - 1 downto 0);
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end record;
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-- type for signals from data memory to datapath
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type dmem_dp is record
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-- data read
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read_data : std_logic_vector(mem_width - 1 downto 0);
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end record;
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-- type for signals from instruction memory to decoder
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type imem_dec is record
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-- instruction read
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read_data : std_logic_vector(mem_width - 1 downto 0);
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-- ready signal, active high
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ready : std_logic;
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-- low/high half-word access (i.e. second bit of imem address)
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instruction_halfword_select : std_logic;
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end record;
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-- Pipeline Stages Combinations
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-- type for signals from decoder to controlpath in all stages
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type dec_cp is record
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-- first stage signals
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s1 : dec_cp_s1;
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-- second stage signals
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s2 : dec_cp_s2;
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-- third stage signals
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s3 : dec_cp_s3;
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-- hardfault signal, active high
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hardfault : std_logic;
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end record;
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-- type for signals from controlpath to datapath in all stages
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type cp_dp is record
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-- first stage signals
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s1 : cp_dp_s1;
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-- second stage signals
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s2 : cp_dp_s2;
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-- third stage signals
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s3 : cp_dp_s3;
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end record;
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-- type for signals from datapath to controlpath in all stages
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type dp_cp is record
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-- second stage signals
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s2 : dp_cp_s2;
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end record;
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-- FUNCTION DECLARATIONS
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-- Conversion Functions
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function to_reg_number(i : integer) return reg_number;
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function to_stdlogicvector(s : size_type) return std_logic_vector;
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function reg_size return size_type;
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-- Default Value Functions
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function get_default_dec_cp_s1 return dec_cp_s1;
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function get_default_dec_cp_s2 return dec_cp_s2;
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function get_default_dec_cp_s3 return dec_cp_s3;
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-- CONSTANT DECLARATIONS (part 2)
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-- register number for stack pointer
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constant sp_num : reg_number := to_reg_number(12);
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-- register number for link register
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constant lr_num : reg_number := to_reg_number(13);
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-- register number for status register
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constant sr_num : reg_number := to_reg_number(14);
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-- register number for pc register
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constant pc_num : reg_number := to_reg_number(15);
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-- OPCODE AND MODE CONSTANT DECLARATIONS
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-- 16 BIT INSTRUCTION OPCODES
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-- opcode of addition (register,register)
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constant op_add : std_logic_vector(3 downto 0) := "0011";
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-- opcode of subtraction
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constant op_sub : std_logic_vector(3 downto 0) := "0001";
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-- opcode of binary and
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constant op_and : std_logic_vector(3 downto 0) := "0010";
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-- opcode of binary or
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constant op_or : std_logic_vector(3 downto 0) := "0000";
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-- opcode of binary xor
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constant op_xor : std_logic_vector(3 downto 0) := "0100";
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-- opcode of left shift
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constant op_lsh : std_logic_vector(3 downto 0) := "0101";
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-- opcode of right shift
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constant op_rsh : std_logic_vector(3 downto 0) := "0110";
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-- opcode of addition with immediate
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constant op_addi : std_logic_vector(3 downto 0) := "0111";
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-- opcode of compare
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constant op_cmp : std_logic_vector(3 downto 0) := "1000";
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-- opcode of set status register
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constant op_tst : std_logic_vector(3 downto 0) := "1001";
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-- opcode of load pc-relative
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constant op_ldr : std_logic_vector(3 downto 0) := "1010";
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-- opcode of memory operations (load and store)
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constant op_mem : std_logic_vector(3 downto 0) := "1011";
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-- opcode of branch/call/trap
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constant op_bct : std_logic_vector(3 downto 0) := "1100";
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-- SHADOW INSTRUCTION OPCODES
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-- opcode of push
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constant op_shd_push : std_logic_vector(3 downto 0) := "0001";
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-- opcode of set SR
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constant op_shd_setsr : std_logic_vector(3 downto 0) := "0010";
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-- opcode of reset instruction
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constant op_shd_reset : std_logic_vector(3 downto 0) := "1111";
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-- COMPARE MODES
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-- compare-mode "is equal"
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constant op_cmp_eq : std_logic_vector(3 downto 0) := "0000";
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-- compare-mode "is not equal"
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constant op_cmp_neq : std_logic_vector(3 downto 0) := "1000";
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-- compare-mode "is greater or equal"
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constant op_cmp_ge : std_logic_vector(3 downto 0) := "0001";
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-- compare-mode "is less than"
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constant op_cmp_ll : std_logic_vector(3 downto 0) := "1001";
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-- compare-mode "is greater than"
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constant op_cmp_gg : std_logic_vector(3 downto 0) := "0010";
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-- compare-mode "is less or equal"
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constant op_cmp_le : std_logic_vector(3 downto 0) := "1010";
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-- compare-mode "always true"
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constant op_cmp_true : std_logic_vector(3 downto 0) := "0011";
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-- compare-mode "always false"
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constant op_cmp_false : std_logic_vector(3 downto 0) := "1011";
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-- BRANCH/CALL/TRAP/RETI MODES
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-- bct-mode "return from interrupt", NB: three bit long!
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constant op_bct_reti : std_logic_vector(2 downto 0) := "000";
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-- bct-mode "branch to table"
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constant op_bct_table : std_logic_vector(1 downto 0) := "00";
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-- bct-mode "branch" (pc=newvalue)
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constant op_bct_branch : std_logic_vector(1 downto 0) := "01";
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-- bct-mode "call" (lr=pc, pc=newvalue)
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constant op_bct_call : std_logic_vector(1 downto 0) := "10";
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|
-- bct-mode "trap" (trigger interrupt)
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constant op_bct_trap : std_logic_vector(1 downto 0) := "11";
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|
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-- MEMORY MODES
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|
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-- mem-mode "load 8 bit"
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constant op_mem_ld08 : std_logic_vector(3 downto 0) := "0000";
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|
-- mem-mode "load 16 bit"
|
|
constant op_mem_ld16 : std_logic_vector(3 downto 0) := "0001";
|
|
-- mem-mode "load 32 bit"
|
|
constant op_mem_ld32 : std_logic_vector(3 downto 0) := "0010";
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|
-- mem-mode "store 8 bit"
|
|
constant op_mem_st08 : std_logic_vector(3 downto 0) := "1000";
|
|
-- mem-mode "store 16 bit"
|
|
constant op_mem_st16 : std_logic_vector(3 downto 0) := "1001";
|
|
-- mem-mode "store 32 bit"
|
|
constant op_mem_st32 : std_logic_vector(3 downto 0) := "1010";
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|
|
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end package lt16x32_internal;
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|
|
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package body lt16x32_internal is
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|
|
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-- CONVERSION FUNCTIONS
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|
|
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-- returns parameter i as reg_number type
|
|
function to_reg_number(i : integer) return reg_number is
|
|
begin
|
|
if ((i >= 0) and (i <= 15)) then
|
|
-- in valid range
|
|
return to_unsigned(i, 4);
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|
else
|
|
-- in invalid range
|
|
assert false report "register number must be between 0 and 15" severity error;
|
|
return to_unsigned(0, 4);
|
|
end if;
|
|
end function to_reg_number;
|
|
|
|
-- returns size as stdlogicvector
|
|
function to_stdlogicvector(s : size_type) return std_logic_vector is
|
|
begin
|
|
case s is
|
|
when size_byte => return "00";
|
|
when size_halfword => return "01";
|
|
when size_word => return "10";
|
|
end case;
|
|
|
|
end function;
|
|
|
|
-- returns register width as size type
|
|
function reg_size return size_type is
|
|
begin
|
|
case reg_width is
|
|
when 8 =>
|
|
return size_byte;
|
|
when 16 =>
|
|
return size_halfword;
|
|
when 32 =>
|
|
return size_word;
|
|
when others => -- will not happen due to assert in core
|
|
return size_byte;
|
|
end case;
|
|
end function reg_size;
|
|
|
|
-- DEFAULT VALUE PARAMETERS
|
|
|
|
-- returns default (nop) configuration for all stage one signals
|
|
function get_default_dec_cp_s1 return dec_cp_s1 is
|
|
variable defaults : dec_cp_s1;
|
|
begin
|
|
defaults.register_read_number_a := to_reg_number(0);
|
|
defaults.register_read_number_b := to_reg_number(0);
|
|
defaults.instruction_width := sel_16bit;
|
|
|
|
return defaults;
|
|
end function get_default_dec_cp_s1;
|
|
|
|
-- returns default (nop) configuration for all stage two signals
|
|
function get_default_dec_cp_s2 return dec_cp_s2 is
|
|
variable defaults : dec_cp_s2;
|
|
begin
|
|
defaults.immediate := to_signed(0, 8);
|
|
defaults.dmem_read_addr_select := sel_register_a;
|
|
defaults.alu_input_data_select := sel_register_b;
|
|
defaults.alu_mode := alu_or;
|
|
|
|
defaults.dmem_read_size := reg_size;
|
|
defaults.dmem_read_en := '0';
|
|
|
|
defaults.pc_summand_select := sel_run;
|
|
defaults.pc_mode_select := sel_relative;
|
|
defaults.pc_condition := sel_unconditional;
|
|
|
|
return defaults;
|
|
end function get_default_dec_cp_s2;
|
|
|
|
-- returns default (nop) configuration for all stage three signals
|
|
function get_default_dec_cp_s3 return dec_cp_s3 is
|
|
variable defaults : dec_cp_s3;
|
|
begin
|
|
defaults.dmem_write_data_select := sel_register_value;
|
|
defaults.register_write_data_select := sel_alu_result;
|
|
defaults.register_write_enable := '0';
|
|
defaults.register_write_number := to_reg_number(0);
|
|
defaults.register_write_size := reg_size;
|
|
|
|
defaults.tflag_write_data_select := sel_alu;
|
|
defaults.tflag_write_enable := '0';
|
|
defaults.ovfflag_write_enable := '0';
|
|
|
|
defaults.dmem_write_size := reg_size;
|
|
defaults.dmem_write_en := '0';
|
|
return defaults;
|
|
end function get_default_dec_cp_s3;
|
|
|
|
end package body lt16x32_internal;
|