Make program ready for real board

This commit is contained in:
2023-01-09 12:21:02 +01:00
parent df940404d9
commit 480e79506e
3 changed files with 28 additions and 18 deletions

View File

@@ -30,6 +30,7 @@ begin
counting <= '0';
else
value <= cnt_value;
counter <= x"00000000";
done <= '0';
if counter = value and counting = '1' then

View File

@@ -35,7 +35,7 @@ ARCHITECTURE sim OF project_2top_tb IS
COMPONENT lt16soc_top IS
generic(
programfilename : string := "../../programs/project.ram"
programfilename : string := "../../programs/project_sim.ram"
);
port(
clk : in std_logic;
@@ -62,9 +62,6 @@ ARCHITECTURE sim OF project_2top_tb IS
BEGIN
soc0: lt16soc_top
generic map(
programfilename => "../../programs/project.ram"
)
port map(
clk=>clk,
rst=>rst,
@@ -78,9 +75,6 @@ BEGIN
);
soc1: lt16soc_top
generic map(
programfilename => "../../programs/project.ram"
)
port map(
clk=>clk,
rst=>rst,
@@ -127,15 +121,15 @@ BEGIN
btn0 <= "00000";
btn1 <= "00001"; -- add
wait for 50us;
btn0 <= "00100"; -- freq
--wait for 50us;
--btn0 <= "00100"; -- freq
wait for 50us;
sw <= x"000B";
sw <= x"0550";
btn0 <= "00000";
btn1 <= "00100"; -- freq
wait for 50us;
wait for 500us;
btn0 <= "00010"; -- clear
wait for 50us;