Make program ready for real board

programs/project.prog

@@ -30,8 +30,8 @@ scrolling_count_addr: .word 0x000F00A4
 priority_mask: .word 0xFFFFFF03
 write_mask: .word 0x1000000
 clear_mask: .word 0x100
-// scrolling_cnt_value: .word 0x20FC000 // for real board
-scrolling_cnt_value: .word 0x500 // for simulation
+scrolling_cnt_value: .word 0x20FC000 // for real board
+// scrolling_cnt_value: .word 0x500 // for simulation
 
 // CAN
 can_control_addr: .word 0x000F0100
@@ -46,10 +46,10 @@ can_output_control_addr: .word 0x000F0108
 // CAN Constants
 acceptance_code: .word 0x00
 acceptance_mask: .word 0xFF
-// btr0: .word 0x45 // for Real board
-// btr1: .word 0x16 // for Real board
-btr0: .word 0x80
-btr1: .word 0x48
+btr0: .word 0x45 // for Real board
+btr1: .word 0x16 // for Real board
+// btr0: .word 0x80
+// btr1: .word 0x48
 output_control: .word 0x02
 control: .word 0xFE
 rx_interrupt_mask: .word 0x01
@@ -93,6 +93,18 @@ main:
     ldr r3, >control
     st08 r0, r3
 
+    // Start scrolling controller
+    ldr r0, >scrolling_addr
+    clr r3
+    addi r3, 0x01
+    st32 r0, r3
+
+    // Set LED to state
+    ldr r0, >led_addr
+    clr r3
+    addi r3, 0x7A
+    st08 r0, r3
+
 loop:
     br >loop
     nop
@@ -107,6 +119,9 @@ switches_interrupt_handler:
     ldr r0, >switches_addr
     ld32 r2, r0
 
+    ldr r0, >led_addr
+    st08 r0, r2
+
     clr r4
 
     ldr r3, >button_data_clear
@@ -409,7 +424,7 @@ handle_frequency_frame:
     // Concat bits
     lsh r8, r8, 8
     or r8, r8, r7
-    // lsh r8, r8, 16 // real board !!!
+    lsh r8, r8, 16 // real board !!!
 
     ldr r0, >scrolling_count_addr_ptr
     ld32 r0, r0

soc/peripheral/scrolling_timer.vhd

@@ -30,6 +30,7 @@ begin
 				counting <= '0';
 			else
 			    value <= cnt_value;
+                counter <= x"00000000";
                 done <= '0';
 
 				if counter = value and counting = '1' then

soc/testbench/project_2top.vhd

@@ -35,7 +35,7 @@ ARCHITECTURE sim OF project_2top_tb IS
 
 	COMPONENT lt16soc_top IS
 		generic(
-			programfilename : string := "../../programs/project.ram"
+			programfilename : string := "../../programs/project_sim.ram"
 		);
 		port(
 			clk		: in  std_logic;
@@ -62,9 +62,6 @@ ARCHITECTURE sim OF project_2top_tb IS
 BEGIN
 
 	soc0: lt16soc_top
-    generic map(
-        programfilename => "../../programs/project.ram"
-    )
     port map(
 		clk=>clk,
 		rst=>rst,
@@ -78,9 +75,6 @@ BEGIN
 	);
 
     soc1: lt16soc_top
-    generic map(
-        programfilename => "../../programs/project.ram"
-    )
     port map(
 		clk=>clk,
 		rst=>rst,
@@ -127,15 +121,15 @@ BEGIN
 		btn0 <= "00000";
 		btn1 <= "00001"; -- add		
 		
-		wait for 50us;
-		btn0 <= "00100"; -- freq
+		--wait for 50us;
+		--btn0 <= "00100"; -- freq
 		
         wait for 50us;
-        sw <= x"000B";
+        sw <= x"0550";
         btn0 <= "00000";
 		btn1 <= "00100"; -- freq
 		
-		wait for 50us;
+		wait for 500us;
 		btn0 <= "00010"; -- clear
 		
         wait for 50us;