Add scrolling program
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@@ -29,7 +29,7 @@ package config is
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constant CFG_LED : integer := CFG_DMEM+1;
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constant CFG_SW : integer := CFG_LED+1;
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constant CFG_TIMER : integer := CFG_SW+1;
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constant CFG_SEG : integer := CFG_TIMER+1;
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constant CFG_SCR : integer := CFG_TIMER+1;
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-----------------------------
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-- base address (BADR) & mask address (MADR)
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@@ -52,6 +52,7 @@ begin
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end if;
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elsif buffer_clear = '1' then
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ptr_last <= -1;
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ptr_write <= 0;
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end if;
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end if;
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end if;
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@@ -65,17 +66,21 @@ begin
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hex_char <= (others => '0');
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else
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hex_char <= (others => '0');
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if next_char = '1' then
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if ptr_last = -1 then -- Special case
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hex_char <= (others => '0');
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else
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hex_char <= ring_buffer(ptr_read);
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if ptr_read = ptr_last then
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ptr_read <= 0;
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if buffer_clear = '1' then
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ptr_read <= 0;
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else
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if next_char = '1' then
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if ptr_last = -1 then -- Special case
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hex_char <= (others => '0');
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else
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ptr_read <= ptr_read + 1;
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hex_char <= ring_buffer(ptr_read);
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if ptr_read = ptr_last then
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ptr_read <= 0;
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else
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ptr_read <= ptr_read + 1;
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end if;
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end if;
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end if;
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end if;
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65
soc/testbench/warmup4.vhd
Normal file
65
soc/testbench/warmup4.vhd
Normal file
@@ -0,0 +1,65 @@
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-- See the file "LICENSE" for the full license governing this code. --
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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ENTITY warmup4_tb IS
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END ENTITY;
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ARCHITECTURE sim OF warmup4_tb IS
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constant CLK_PERIOD : time := 10 ns;
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signal clk : std_logic := '0';
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signal rst : std_logic;
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signal led : std_logic_vector(7 downto 0);
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signal btn : std_logic_vector(4 downto 0) := (others => '0');
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signal sw : std_logic_vector(15 downto 0) := (others => '0');
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signal anodes : std_logic_vector(7 downto 0);
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signal cathodes : std_logic_vector(7 downto 0);
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COMPONENT lt16soc_top IS
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generic(
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programfilename : string := "../../programs/scrolling.ram"
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);
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port(
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clk : in std_logic;
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rst : in std_logic;
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led : out std_logic_vector(7 downto 0);
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btn : in std_logic_vector(4 downto 0);
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sw : in std_logic_vector(15 downto 0);
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anodes : out std_logic_vector(7 downto 0);
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cathodes : out std_logic_vector(7 downto 0)
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);
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END COMPONENT;
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BEGIN
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dut: lt16soc_top port map(
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clk=>clk,
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rst=>rst,
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led=>led,
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btn=>btn,
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sw=>sw,
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anodes=>anodes,
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cathodes=>cathodes
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);
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clk_gen: process
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begin
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clk <= not clk;
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wait for CLK_PERIOD/2;
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end process clk_gen;
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stimuli: process
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begin
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rst <= '0';
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wait for CLK_PERIOD;
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rst <= '1';
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wait for 2ms;
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assert false report "Simulation terminated!" severity failure;
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end process stimuli;
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END ARCHITECTURE;
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@@ -204,16 +204,16 @@ begin
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clk,rst_gen,slvi(CFG_TIMER),slvo(CFG_TIMER), irq_lines(3)
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);
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segmentdev : wb_segment_adv
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scrollingdev : wb_scrolling
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generic map(
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memaddr => CFG_BADR_SEG,
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addrmask => CFG_MADR_SEG
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memaddr => CFG_BADR_SCR,
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addrmask => CFG_MADR_SCR
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)
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port map(
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clk => clk,
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rst => rst_gen,
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wslvi => slvi(CFG_SEG),
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wslvo => slvo(CFG_SEG),
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wslvi => slvi(CFG_SCR),
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wslvo => slvo(CFG_SCR),
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anodes => anodes,
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cathodes => cathodes
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