From 4666ae9bf8b3aa3c84f2d829166acf8cf8b07291 Mon Sep 17 00:00:00 2001 From: Derek Christ Date: Sun, 20 Nov 2022 17:48:42 +0100 Subject: [PATCH] Add scrolling program --- programs/scrolling.prog | 328 ++++++++++++++++++++++++++++ soc/lib/config.vhd | 2 +- soc/peripheral/scrolling_buffer.vhd | 25 ++- soc/testbench/warmup4.vhd | 65 ++++++ soc/top/top.vhd | 10 +- 5 files changed, 414 insertions(+), 16 deletions(-) create mode 100644 programs/scrolling.prog create mode 100644 soc/testbench/warmup4.vhd diff --git a/programs/scrolling.prog b/programs/scrolling.prog new file mode 100644 index 0000000..d744e12 --- /dev/null +++ b/programs/scrolling.prog @@ -0,0 +1,328 @@ +reset: +br always >main +nop +hardfault: +reti +nop +memfault: +reti +nop + +.align +scrolling_addr: .word 0x000F00A0 +scrolling_count_addr: .word 0x000F00A4 + +// scrolling_cnt_value: .word 0x0FC000 // for real board +scrolling_cnt_value: .word 0x100 // for simulation + +// w_cnt_top: .word 0xFFC000 // for real board +w_cnt_top: .word 0x3000 //for simulation + +write_mask: + .word 0x1000000 + +clear_mask: + .word 0x100 + +main: + ldr r8, >w_cnt_top + + ldr r0, >scrolling_addr + ldr r1, >write_mask + ldr r2, >clear_mask + +number_loop: + // Set scrolling speed + ldr r5, >scrolling_count_addr + ldr r7, >scrolling_cnt_value + st32 r5, r7 + + // --------- 132457689BACDFE0 --------- + clr r4 + addi r4, 0x1 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x3 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x2 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x4 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x5 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x7 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x6 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x8 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x9 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xB + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xA + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xC + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xD + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xF + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xE + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x0 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + // Turn on + clr r4 + addi r4, 0x1 + st32 r0, r4 + + call >wait + nop + + // Turn off + clr r4 + addi r4, 0x1 + st32 r0, r4 + + // Double scrolling speed + ldr r5, >scrolling_count_addr + ldr r7, >scrolling_cnt_value + rsh r7, r7, 1 // Divide by 2 + st32 r5, r7 + + // Clear + clr r4 + or r4, r4, r2 + st32 r0, r4 + + // --------- DEAD BEEF --------- + clr r4 + addi r4, 0xD + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xE + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xA + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xD + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x10 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xB + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xE + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xE + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0xF + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + // Turn on + clr r4 + addi r4, 0x1 + st32 r0, r4 + + call >wait + nop + + // Turn off + clr r4 + addi r4, 0x1 + st32 r0, r4 + + // Clear + clr r4 + or r4, r4, r2 + st32 r0, r4 + + // --------- 1 --------- + clr r4 + addi r4, 0x1 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + // Turn on + clr r4 + addi r4, 0x1 + st32 r0, r4 + + call >wait + nop + + // Turn off + clr r4 + addi r4, 0x1 + st32 r0, r4 + + // Clear + clr r4 + or r4, r4, r2 + st32 r0, r4 + + // --------- 2 3 --------- + clr r4 + addi r4, 0x2 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x3 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + // Turn on + clr r4 + addi r4, 0x1 + st32 r0, r4 + + call >wait + nop + + // Turn off + clr r4 + addi r4, 0x1 + st32 r0, r4 + + // Clear + clr r4 + or r4, r4, r2 + st32 r0, r4 + + // --------- 0 0 0 0 0 --------- + clr r4 + addi r4, 0x0 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x0 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + clr r4 + addi r4, 0x0 + lsh r4, r4, 16 + or r4, r4, r1 + st32 r0, r4 + + // Turn on + clr r4 + addi r4, 0x1 + st32 r0, r4 + + call >wait + nop + + br always >reset + nop + +//subroutine to iterate until counter overflow +wait: + clr r7 //inititalize inner counter + inc_i: + cmp neq r7,r8 + br true >inc_i //if i=cnt_top + addi r7,1 + ret //else + nop diff --git a/soc/lib/config.vhd b/soc/lib/config.vhd index aae1339..34d3eb1 100644 --- a/soc/lib/config.vhd +++ b/soc/lib/config.vhd @@ -29,7 +29,7 @@ package config is constant CFG_LED : integer := CFG_DMEM+1; constant CFG_SW : integer := CFG_LED+1; constant CFG_TIMER : integer := CFG_SW+1; - constant CFG_SEG : integer := CFG_TIMER+1; + constant CFG_SCR : integer := CFG_TIMER+1; ----------------------------- -- base address (BADR) & mask address (MADR) diff --git a/soc/peripheral/scrolling_buffer.vhd b/soc/peripheral/scrolling_buffer.vhd index bf0b5d7..fefb57a 100644 --- a/soc/peripheral/scrolling_buffer.vhd +++ b/soc/peripheral/scrolling_buffer.vhd @@ -52,6 +52,7 @@ begin end if; elsif buffer_clear = '1' then ptr_last <= -1; + ptr_write <= 0; end if; end if; end if; @@ -65,17 +66,21 @@ begin hex_char <= (others => '0'); else hex_char <= (others => '0'); - - if next_char = '1' then - if ptr_last = -1 then -- Special case - hex_char <= (others => '0'); - else - hex_char <= ring_buffer(ptr_read); - - if ptr_read = ptr_last then - ptr_read <= 0; + + if buffer_clear = '1' then + ptr_read <= 0; + else + if next_char = '1' then + if ptr_last = -1 then -- Special case + hex_char <= (others => '0'); else - ptr_read <= ptr_read + 1; + hex_char <= ring_buffer(ptr_read); + + if ptr_read = ptr_last then + ptr_read <= 0; + else + ptr_read <= ptr_read + 1; + end if; end if; end if; end if; diff --git a/soc/testbench/warmup4.vhd b/soc/testbench/warmup4.vhd new file mode 100644 index 0000000..429db14 --- /dev/null +++ b/soc/testbench/warmup4.vhd @@ -0,0 +1,65 @@ +-- See the file "LICENSE" for the full license governing this code. -- +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; +USE ieee.numeric_std.ALL; + +ENTITY warmup4_tb IS +END ENTITY; + +ARCHITECTURE sim OF warmup4_tb IS + + constant CLK_PERIOD : time := 10 ns; + + signal clk : std_logic := '0'; + signal rst : std_logic; + + signal led : std_logic_vector(7 downto 0); + signal btn : std_logic_vector(4 downto 0) := (others => '0'); + signal sw : std_logic_vector(15 downto 0) := (others => '0'); + signal anodes : std_logic_vector(7 downto 0); + signal cathodes : std_logic_vector(7 downto 0); + + COMPONENT lt16soc_top IS + generic( + programfilename : string := "../../programs/scrolling.ram" + ); + port( + clk : in std_logic; + rst : in std_logic; + led : out std_logic_vector(7 downto 0); + btn : in std_logic_vector(4 downto 0); + sw : in std_logic_vector(15 downto 0); + anodes : out std_logic_vector(7 downto 0); + cathodes : out std_logic_vector(7 downto 0) + ); + END COMPONENT; + +BEGIN + + dut: lt16soc_top port map( + clk=>clk, + rst=>rst, + led=>led, + btn=>btn, + sw=>sw, + anodes=>anodes, + cathodes=>cathodes + ); + + clk_gen: process + begin + clk <= not clk; + wait for CLK_PERIOD/2; + end process clk_gen; + + stimuli: process + begin + rst <= '0'; + wait for CLK_PERIOD; + rst <= '1'; + wait for 2ms; + assert false report "Simulation terminated!" severity failure; + end process stimuli; + + +END ARCHITECTURE; diff --git a/soc/top/top.vhd b/soc/top/top.vhd index 296a09f..85c1f24 100644 --- a/soc/top/top.vhd +++ b/soc/top/top.vhd @@ -204,16 +204,16 @@ begin clk,rst_gen,slvi(CFG_TIMER),slvo(CFG_TIMER), irq_lines(3) ); - segmentdev : wb_segment_adv + scrollingdev : wb_scrolling generic map( - memaddr => CFG_BADR_SEG, - addrmask => CFG_MADR_SEG + memaddr => CFG_BADR_SCR, + addrmask => CFG_MADR_SCR ) port map( clk => clk, rst => rst_gen, - wslvi => slvi(CFG_SEG), - wslvo => slvo(CFG_SEG), + wslvi => slvi(CFG_SCR), + wslvo => slvo(CFG_SCR), anodes => anodes, cathodes => cathodes