316538bf8a
Currently gem5 assumes the amdgpu device to be Vega10. In order to support more devices we need to handle situations where different registers and addresses have the same functionality but different offsets on different devices. This changeset adds an NBIO class to handle device discovery and driver initialization related tasks, pulling them out of the AMDGPUDevice class. The offsets used for MMIOs are reworked slightly to use offsets rather than absolute addresses. This is because we cannot determine the absolute address in the constructor since the BAR has not been assigned by the OS yet. Change-Id: I14b364374e086e185978334425a4e265cf2760d0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70041 Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com> Maintainer: Matt Sinclair <mattdsinclair@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
56 lines
2.4 KiB
Python
56 lines
2.4 KiB
Python
# Copyright (c) 2021 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its
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# contributors may be used to endorse or promote products derived from this
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# software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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Import('*')
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if not env['CONF']['BUILD_GPU']:
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Return()
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# Controllers
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SimObject('AMDGPU.py', sim_objects=['AMDGPUDevice', 'AMDGPUInterruptHandler',
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'AMDGPUMemoryManager', 'AMDGPUSystemHub',
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'SDMAEngine', 'PM4PacketProcessor'],
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tags='x86 isa')
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Source('amdgpu_device.cc', tags='x86 isa')
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Source('amdgpu_nbio.cc', tags='x86 isa')
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Source('amdgpu_vm.cc', tags='x86 isa')
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Source('interrupt_handler.cc', tags='x86 isa')
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Source('memory_manager.cc', tags='x86 isa')
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Source('mmio_reader.cc', tags='x86 isa')
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Source('pm4_packet_processor.cc', tags='x86 isa')
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Source('sdma_engine.cc', tags='x86 isa')
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Source('system_hub.cc', tags='x86 isa')
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DebugFlag('AMDGPUDevice', tags='x86 isa')
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DebugFlag('AMDGPUMem', tags='x86 isa')
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DebugFlag('PM4PacketProcessor', tags='x86 isa')
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DebugFlag('SDMAEngine', tags='x86 isa')
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DebugFlag('SDMAData', tags='x86 isa')
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