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f1f85c5470c67adc5071296c53e69abb0b47b09c
gem5/dev
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Nathan Binkert f1f85c5470 better debugging of DMA operations 
dev/ns_gige.cc:
    use the new PhysicalMemory dma_read and dma_write functions

--HG--
extra : convert_revision : 427049d43355f02ac8bdfe2e60c24825dd734006
2004-07-30 11:09:03 -04:00
..
alpha_access.h
- Whack unused code
2004-02-09 10:49:48 -05:00
alpha_console.cc
allow the use of old console code and update elf_object not to rely on EM_ALPHA value.
2004-06-27 14:33:55 -04:00
alpha_console.hh
allow the use of old console code and update elf_object not to rely on EM_ALPHA value.
2004-06-27 14:33:55 -04:00
baddev.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
baddev.hh
Fixes for detailed boot, made cttz and ctlz instructions more compact,
2004-06-10 13:30:58 -04:00
disk_image.cc
store the checkpoint to the proper directory
2004-07-08 15:59:46 -04:00
disk_image.hh
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherbus.cc
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherbus.hh
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherdump.cc
Add support to store less than the full packet in an etherdump
2004-07-22 23:54:24 -04:00
etherdump.hh
Add support to store less than the full packet in an etherdump
2004-07-22 23:54:24 -04:00
etherint.cc
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherint.hh
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherlink.cc
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
etherlink.hh
notify the transmitter when the packet has finished transmitting.
2004-07-23 00:05:29 -04:00
etherpkt.cc
This is where I'm at for Linux Ethernet before I head to Mexico.
2004-04-21 18:23:41 -04:00
etherpkt.hh
l
2004-06-21 17:25:18 -04:00
ethertap.cc
Merge saidi@zizzer.eecs.umich.edu:/bk/linux
2004-06-21 01:04:48 -04:00
ethertap.hh
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
ide_ctrl.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
ide_ctrl.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
ide_disk.cc
Remove second pciToDma translation on current PRD address pointer b/c
2004-07-09 22:32:27 -04:00
ide_disk.hh
Fix to properly shadow the DEV bit in the Drive/Head register so other
2004-06-23 15:37:05 -04:00
io_device.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
io_device.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
ns_gige_reg.h
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
ns_gige.cc
better debugging of DMA operations
2004-07-30 11:09:03 -04:00
ns_gige.hh
style
2004-07-26 23:10:20 -04:00
pciconfigall.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
pciconfigall.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
pcidev.cc
more modifications for cross-endian support. linux now gets to pciconfig
2004-06-23 15:07:09 -04:00
pcidev.hh
Updated copyright on Tsunami and kern/linux files.
2004-06-04 13:43:50 -04:00
pcireg.h
minor mods for mimicking NS83820 functionality
2004-06-12 14:24:20 -04:00
platform.cc
Updated copyright on Tsunami and kern/linux files.
2004-06-04 13:43:50 -04:00
platform.hh
rewrote uart and renamed console.cc to simconsole to reduce confusion
2004-06-26 21:26:28 -04:00
simconsole.cc
rewrote uart and renamed console.cc to simconsole to reduce confusion
2004-06-26 21:26:28 -04:00
simconsole.hh
rewrote uart and renamed console.cc to simconsole to reduce confusion
2004-06-26 21:26:28 -04:00
simple_disk.cc
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
simple_disk.hh
Updated Copyright with information in bitkeeper changelogs
2004-06-08 13:37:27 -04:00
tsunami_cchip.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami_cchip.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami_io.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami_io.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami_pchip.cc
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami_pchip.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00
tsunami.cc
rewrote uart and renamed console.cc to simconsole to reduce confusion
2004-06-26 21:26:28 -04:00
tsunami.hh
Updated copyright on Tsunami and kern/linux files.
2004-06-04 13:43:50 -04:00
tsunamireg.h
rewrote uart and renamed console.cc to simconsole to reduce confusion
2004-06-26 21:26:28 -04:00
uart.cc
Fix serialization when a tx interrupt isn't scheduled
2004-07-14 21:34:51 -04:00
uart.hh
make the cache access latency a parameter that is based on bus
2004-07-12 22:58:22 -04:00