Daniel R. Carvalho f119531fc1 mem-cache: Add MoveToTail to FALRU ...

FALRU was missing MoveToTail functionality within its invalidate
function, and MoveToHead was doing unnecessary passes when the
moved block was the head already.

Besides, added some comments to make the code understandable.

Change-Id: I2430d82b5d53c88b102a62610ea38b46d6e03a55
Reviewed-on: https://gem5-review.googlesource.com/9541
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

2018-04-13 09:27:52 +00:00

..

arch

arch-arm: Fix mrc,mcr to cop14 disassemble

2018-04-10 17:12:37 +00:00

base

base: Make bitunion output functions static/inline.

2018-03-30 19:22:46 +00:00

cpu

cpu: Remove ExtMachInst typedefs from the O3 CPU model.

2018-03-27 10:58:01 +00:00

dev

dev: arm: SetScaling commands don't send parameter bytes.

2018-04-10 11:46:52 +00:00

doc

sim: Adding support for power models

2016-06-06 17:16:44 +01:00

doxygen

…

gpu-compute

hsail: Get rid of an inert private member of StorageSpace.

2018-03-22 19:46:54 +00:00

kern

sim-se: Add /sys/devices/system/cpu/online file

2018-03-15 20:45:34 +00:00

learning_gem5

learning_gem5: Add a simple Ruby protocol

2018-03-23 15:50:28 +00:00

mem

mem-cache: Add MoveToTail to FALRU

2018-04-13 09:27:52 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

sim

sim-se: Fix fallthrough in prlimit

2018-03-15 20:45:34 +00:00

unittest

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

Doxyfile

…

SConscript

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00