cc076757e1
This patch updates the binaries and results for hello and insttest regressions using the compressed extension. Change-Id: I3d8f2248f490521d3e0dc05c48735cab82b1b04e Reviewed-on: https://gem5-review.googlesource.com/4042 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
50 lines
1.5 KiB
Plaintext
Executable File
50 lines
1.5 KiB
Plaintext
Executable File
Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-timing-ruby/simout
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Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-timing-ruby/simerr
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Jul 13 2017 17:09:45
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gem5 started Jul 13 2017 17:09:50
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gem5 executing on boldrock, pid 1343
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command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64m/simple-timing-ruby
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Global frequency set at 1000000000 ticks per second
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mul: PASS
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mul, overflow: PASS
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mulh: PASS
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mulh, negative: PASS
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mulh, all bits set: PASS
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mulhsu, all bits set: PASS
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mulhsu: PASS
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mulhu: PASS
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mulhu, all bits set: PASS
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div: PASS
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div/0: PASS
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div, overflow: PASS
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divu: PASS
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divu/0: PASS
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divu, "overflow": PASS
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rem: PASS
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rem/0: PASS
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rem, overflow: PASS
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remu: PASS
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remu/0: PASS
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remu, "overflow": PASS
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mulw, truncate: PASS
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mulw, overflow: PASS
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divw, truncate: PASS
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divw/0: PASS
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divw, overflow: PASS
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divuw, truncate: PASS
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divuw/0: PASS
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divuw, "overflow": PASS
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divuw, sign extend: PASS
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remw, truncate: PASS
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remw/0: PASS
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remw, overflow: PASS
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remuw, truncate: PASS
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remuw/0: PASS
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remuw, "overflow": PASS
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remuw, sign extend: PASS
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Exiting @ tick 1858825 because exiting with last active thread context
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