The change below changed the behavior of interrupts on ARM and changed the
stats for the 10.linux-boot regression.
commit 746e2f3c27
Author: Sudhanshu Jha <sudhanshu.jha@arm.com>
Date: Mon Feb 27 10:29:56 2017 +0000
arm, kmi: Clear interrupts in KMI devices
Change-Id: Ie1cfc26777f6ed2d3fd4340175941fda1fdb5b6a
Reviewed-on: https://gem5-review.googlesource.com/2653
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
1557 lines
125 KiB
Plaintext
1557 lines
125 KiB
Plaintext
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---------- Begin Simulation Statistics ----------
|
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sim_seconds 2.905306
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sim_ticks 2905305537500
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final_tick 2905305537500
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sim_freq 1000000000000
|
|
host_inst_rate 1111245
|
|
host_op_rate 1339819
|
|
host_tick_rate 28710628480
|
|
host_mem_usage 591900
|
|
host_seconds 101.19
|
|
sim_insts 112449853
|
|
sim_ops 135579871
|
|
system.voltage_domain.voltage 1
|
|
system.clk_domain.clock 1000
|
|
system.physmem.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.physmem.bytes_read::cpu.dtb.walker 448
|
|
system.physmem.bytes_read::cpu.itb.walker 128
|
|
system.physmem.bytes_read::cpu.inst 1186468
|
|
system.physmem.bytes_read::cpu.data 8969572
|
|
system.physmem.bytes_read::realview.ide 960
|
|
system.physmem.bytes_read::total 10157576
|
|
system.physmem.bytes_inst_read::cpu.inst 1186468
|
|
system.physmem.bytes_inst_read::total 1186468
|
|
system.physmem.bytes_written::writebacks 7562240
|
|
system.physmem.bytes_written::cpu.data 17524
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system.physmem.bytes_written::total 7579764
|
|
system.physmem.num_reads::cpu.dtb.walker 7
|
|
system.physmem.num_reads::cpu.itb.walker 2
|
|
system.physmem.num_reads::cpu.inst 26992
|
|
system.physmem.num_reads::cpu.data 140669
|
|
system.physmem.num_reads::realview.ide 15
|
|
system.physmem.num_reads::total 167685
|
|
system.physmem.num_writes::writebacks 118160
|
|
system.physmem.num_writes::cpu.data 4381
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|
system.physmem.num_writes::total 122541
|
|
system.physmem.bw_read::cpu.dtb.walker 154
|
|
system.physmem.bw_read::cpu.itb.walker 44
|
|
system.physmem.bw_read::cpu.inst 408380
|
|
system.physmem.bw_read::cpu.data 3087308
|
|
system.physmem.bw_read::realview.ide 330
|
|
system.physmem.bw_read::total 3496216
|
|
system.physmem.bw_inst_read::cpu.inst 408380
|
|
system.physmem.bw_inst_read::total 408380
|
|
system.physmem.bw_write::writebacks 2602907
|
|
system.physmem.bw_write::cpu.data 6032
|
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system.physmem.bw_write::total 2608939
|
|
system.physmem.bw_total::writebacks 2602907
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|
system.physmem.bw_total::cpu.dtb.walker 154
|
|
system.physmem.bw_total::cpu.itb.walker 44
|
|
system.physmem.bw_total::cpu.inst 408380
|
|
system.physmem.bw_total::cpu.data 3093339
|
|
system.physmem.bw_total::realview.ide 330
|
|
system.physmem.bw_total::total 6105155
|
|
system.physmem.readReqs 167685
|
|
system.physmem.writeReqs 122541
|
|
system.physmem.readBursts 167685
|
|
system.physmem.writeBursts 122541
|
|
system.physmem.bytesReadDRAM 10724672
|
|
system.physmem.bytesReadWrQ 7168
|
|
system.physmem.bytesWritten 7592640
|
|
system.physmem.bytesReadSys 10157576
|
|
system.physmem.bytesWrittenSys 7579764
|
|
system.physmem.servicedByWrQ 112
|
|
system.physmem.mergedWrBursts 3887
|
|
system.physmem.neitherReadNorWriteReqs 0
|
|
system.physmem.perBankRdBursts::0 9873
|
|
system.physmem.perBankRdBursts::1 9614
|
|
system.physmem.perBankRdBursts::2 9963
|
|
system.physmem.perBankRdBursts::3 9595
|
|
system.physmem.perBankRdBursts::4 18744
|
|
system.physmem.perBankRdBursts::5 9936
|
|
system.physmem.perBankRdBursts::6 10635
|
|
system.physmem.perBankRdBursts::7 11205
|
|
system.physmem.perBankRdBursts::8 9589
|
|
system.physmem.perBankRdBursts::9 10032
|
|
system.physmem.perBankRdBursts::10 9283
|
|
system.physmem.perBankRdBursts::11 8863
|
|
system.physmem.perBankRdBursts::12 10211
|
|
system.physmem.perBankRdBursts::13 10190
|
|
system.physmem.perBankRdBursts::14 10325
|
|
system.physmem.perBankRdBursts::15 9515
|
|
system.physmem.perBankWrBursts::0 7137
|
|
system.physmem.perBankWrBursts::1 7022
|
|
system.physmem.perBankWrBursts::2 7742
|
|
system.physmem.perBankWrBursts::3 7365
|
|
system.physmem.perBankWrBursts::4 7465
|
|
system.physmem.perBankWrBursts::5 7289
|
|
system.physmem.perBankWrBursts::6 7716
|
|
system.physmem.perBankWrBursts::7 8300
|
|
system.physmem.perBankWrBursts::8 7184
|
|
system.physmem.perBankWrBursts::9 7439
|
|
system.physmem.perBankWrBursts::10 6836
|
|
system.physmem.perBankWrBursts::11 6804
|
|
system.physmem.perBankWrBursts::12 7947
|
|
system.physmem.perBankWrBursts::13 7681
|
|
system.physmem.perBankWrBursts::14 7752
|
|
system.physmem.perBankWrBursts::15 6956
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|
system.physmem.numRdRetry 0
|
|
system.physmem.numWrRetry 63
|
|
system.physmem.totGap 2905305175500
|
|
system.physmem.readPktSize::0 0
|
|
system.physmem.readPktSize::1 0
|
|
system.physmem.readPktSize::2 9558
|
|
system.physmem.readPktSize::3 14
|
|
system.physmem.readPktSize::4 0
|
|
system.physmem.readPktSize::5 0
|
|
system.physmem.readPktSize::6 158113
|
|
system.physmem.writePktSize::0 0
|
|
system.physmem.writePktSize::1 0
|
|
system.physmem.writePktSize::2 4381
|
|
system.physmem.writePktSize::3 0
|
|
system.physmem.writePktSize::4 0
|
|
system.physmem.writePktSize::5 0
|
|
system.physmem.writePktSize::6 118160
|
|
system.physmem.rdQLenPdf::0 166739
|
|
system.physmem.rdQLenPdf::1 559
|
|
system.physmem.rdQLenPdf::2 263
|
|
system.physmem.rdQLenPdf::3 1
|
|
system.physmem.rdQLenPdf::4 1
|
|
system.physmem.rdQLenPdf::5 1
|
|
system.physmem.rdQLenPdf::6 1
|
|
system.physmem.rdQLenPdf::7 1
|
|
system.physmem.rdQLenPdf::8 1
|
|
system.physmem.rdQLenPdf::9 1
|
|
system.physmem.rdQLenPdf::10 1
|
|
system.physmem.rdQLenPdf::11 1
|
|
system.physmem.rdQLenPdf::12 1
|
|
system.physmem.rdQLenPdf::13 1
|
|
system.physmem.rdQLenPdf::14 1
|
|
system.physmem.rdQLenPdf::15 0
|
|
system.physmem.rdQLenPdf::16 0
|
|
system.physmem.rdQLenPdf::17 0
|
|
system.physmem.rdQLenPdf::18 0
|
|
system.physmem.rdQLenPdf::19 0
|
|
system.physmem.rdQLenPdf::20 0
|
|
system.physmem.rdQLenPdf::21 0
|
|
system.physmem.rdQLenPdf::22 0
|
|
system.physmem.rdQLenPdf::23 0
|
|
system.physmem.rdQLenPdf::24 0
|
|
system.physmem.rdQLenPdf::25 0
|
|
system.physmem.rdQLenPdf::26 0
|
|
system.physmem.rdQLenPdf::27 0
|
|
system.physmem.rdQLenPdf::28 0
|
|
system.physmem.rdQLenPdf::29 0
|
|
system.physmem.rdQLenPdf::30 0
|
|
system.physmem.rdQLenPdf::31 0
|
|
system.physmem.wrQLenPdf::0 1
|
|
system.physmem.wrQLenPdf::1 1
|
|
system.physmem.wrQLenPdf::2 1
|
|
system.physmem.wrQLenPdf::3 1
|
|
system.physmem.wrQLenPdf::4 1
|
|
system.physmem.wrQLenPdf::5 1
|
|
system.physmem.wrQLenPdf::6 1
|
|
system.physmem.wrQLenPdf::7 1
|
|
system.physmem.wrQLenPdf::8 1
|
|
system.physmem.wrQLenPdf::9 1
|
|
system.physmem.wrQLenPdf::10 1
|
|
system.physmem.wrQLenPdf::11 1
|
|
system.physmem.wrQLenPdf::12 1
|
|
system.physmem.wrQLenPdf::13 1
|
|
system.physmem.wrQLenPdf::14 1
|
|
system.physmem.wrQLenPdf::15 1874
|
|
system.physmem.wrQLenPdf::16 2840
|
|
system.physmem.wrQLenPdf::17 5990
|
|
system.physmem.wrQLenPdf::18 5890
|
|
system.physmem.wrQLenPdf::19 6230
|
|
system.physmem.wrQLenPdf::20 5856
|
|
system.physmem.wrQLenPdf::21 6225
|
|
system.physmem.wrQLenPdf::22 6586
|
|
system.physmem.wrQLenPdf::23 7530
|
|
system.physmem.wrQLenPdf::24 7116
|
|
system.physmem.wrQLenPdf::25 8216
|
|
system.physmem.wrQLenPdf::26 8865
|
|
system.physmem.wrQLenPdf::27 7091
|
|
system.physmem.wrQLenPdf::28 6561
|
|
system.physmem.wrQLenPdf::29 6513
|
|
system.physmem.wrQLenPdf::30 6308
|
|
system.physmem.wrQLenPdf::31 6117
|
|
system.physmem.wrQLenPdf::32 6210
|
|
system.physmem.wrQLenPdf::33 449
|
|
system.physmem.wrQLenPdf::34 397
|
|
system.physmem.wrQLenPdf::35 386
|
|
system.physmem.wrQLenPdf::36 303
|
|
system.physmem.wrQLenPdf::37 299
|
|
system.physmem.wrQLenPdf::38 283
|
|
system.physmem.wrQLenPdf::39 257
|
|
system.physmem.wrQLenPdf::40 228
|
|
system.physmem.wrQLenPdf::41 270
|
|
system.physmem.wrQLenPdf::42 247
|
|
system.physmem.wrQLenPdf::43 240
|
|
system.physmem.wrQLenPdf::44 228
|
|
system.physmem.wrQLenPdf::45 174
|
|
system.physmem.wrQLenPdf::46 175
|
|
system.physmem.wrQLenPdf::47 154
|
|
system.physmem.wrQLenPdf::48 169
|
|
system.physmem.wrQLenPdf::49 180
|
|
system.physmem.wrQLenPdf::50 174
|
|
system.physmem.wrQLenPdf::51 137
|
|
system.physmem.wrQLenPdf::52 121
|
|
system.physmem.wrQLenPdf::53 122
|
|
system.physmem.wrQLenPdf::54 117
|
|
system.physmem.wrQLenPdf::55 150
|
|
system.physmem.wrQLenPdf::56 246
|
|
system.physmem.wrQLenPdf::57 214
|
|
system.physmem.wrQLenPdf::58 117
|
|
system.physmem.wrQLenPdf::59 199
|
|
system.physmem.wrQLenPdf::60 201
|
|
system.physmem.wrQLenPdf::61 189
|
|
system.physmem.wrQLenPdf::62 68
|
|
system.physmem.wrQLenPdf::63 127
|
|
system.physmem.bytesPerActivate::samples 57696
|
|
system.physmem.bytesPerActivate::mean 317.478647
|
|
system.physmem.bytesPerActivate::gmean 186.529934
|
|
system.physmem.bytesPerActivate::stdev 335.962495
|
|
system.physmem.bytesPerActivate::0-127 20572 35.66% 35.66%
|
|
system.physmem.bytesPerActivate::128-255 14702 25.48% 61.14%
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|
system.physmem.bytesPerActivate::256-383 5653 9.80% 70.94%
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|
system.physmem.bytesPerActivate::384-511 3146 5.45% 76.39%
|
|
system.physmem.bytesPerActivate::512-639 2423 4.20% 80.59%
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|
system.physmem.bytesPerActivate::640-767 1393 2.41% 83.00%
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|
system.physmem.bytesPerActivate::768-895 1271 2.20% 85.21%
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|
system.physmem.bytesPerActivate::896-1023 917 1.59% 86.79%
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|
system.physmem.bytesPerActivate::1024-1151 7619 13.21% 100.00%
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|
system.physmem.bytesPerActivate::total 57696
|
|
system.physmem.rdPerTurnAround::samples 5793
|
|
system.physmem.rdPerTurnAround::mean 28.926463
|
|
system.physmem.rdPerTurnAround::stdev 588.910199
|
|
system.physmem.rdPerTurnAround::0-2047 5792 99.98% 99.98%
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|
system.physmem.rdPerTurnAround::43008-45055 1 0.02% 100.00%
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system.physmem.rdPerTurnAround::total 5793
|
|
system.physmem.wrPerTurnAround::samples 5793
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|
system.physmem.wrPerTurnAround::mean 20.479026
|
|
system.physmem.wrPerTurnAround::gmean 18.531275
|
|
system.physmem.wrPerTurnAround::stdev 14.943169
|
|
system.physmem.wrPerTurnAround::16-19 5068 87.48% 87.48%
|
|
system.physmem.wrPerTurnAround::20-23 43 0.74% 88.23%
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|
system.physmem.wrPerTurnAround::24-27 40 0.69% 88.92%
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|
system.physmem.wrPerTurnAround::28-31 53 0.91% 89.83%
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|
system.physmem.wrPerTurnAround::32-35 289 4.99% 94.82%
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|
system.physmem.wrPerTurnAround::36-39 23 0.40% 95.22%
|
|
system.physmem.wrPerTurnAround::40-43 16 0.28% 95.49%
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|
system.physmem.wrPerTurnAround::44-47 6 0.10% 95.60%
|
|
system.physmem.wrPerTurnAround::48-51 5 0.09% 95.68%
|
|
system.physmem.wrPerTurnAround::52-55 2 0.03% 95.72%
|
|
system.physmem.wrPerTurnAround::56-59 1 0.02% 95.74%
|
|
system.physmem.wrPerTurnAround::60-63 5 0.09% 95.82%
|
|
system.physmem.wrPerTurnAround::64-67 158 2.73% 98.55%
|
|
system.physmem.wrPerTurnAround::68-71 7 0.12% 98.67%
|
|
system.physmem.wrPerTurnAround::72-75 5 0.09% 98.76%
|
|
system.physmem.wrPerTurnAround::76-79 5 0.09% 98.84%
|
|
system.physmem.wrPerTurnAround::80-83 8 0.14% 98.98%
|
|
system.physmem.wrPerTurnAround::84-87 5 0.09% 99.07%
|
|
system.physmem.wrPerTurnAround::96-99 2 0.03% 99.10%
|
|
system.physmem.wrPerTurnAround::104-107 2 0.03% 99.14%
|
|
system.physmem.wrPerTurnAround::108-111 9 0.16% 99.29%
|
|
system.physmem.wrPerTurnAround::116-119 2 0.03% 99.33%
|
|
system.physmem.wrPerTurnAround::120-123 1 0.02% 99.34%
|
|
system.physmem.wrPerTurnAround::124-127 2 0.03% 99.38%
|
|
system.physmem.wrPerTurnAround::128-131 8 0.14% 99.52%
|
|
system.physmem.wrPerTurnAround::132-135 5 0.09% 99.60%
|
|
system.physmem.wrPerTurnAround::136-139 5 0.09% 99.69%
|
|
system.physmem.wrPerTurnAround::140-143 6 0.10% 99.79%
|
|
system.physmem.wrPerTurnAround::144-147 1 0.02% 99.81%
|
|
system.physmem.wrPerTurnAround::156-159 1 0.02% 99.83%
|
|
system.physmem.wrPerTurnAround::160-163 4 0.07% 99.90%
|
|
system.physmem.wrPerTurnAround::172-175 2 0.03% 99.93%
|
|
system.physmem.wrPerTurnAround::180-183 2 0.03% 99.97%
|
|
system.physmem.wrPerTurnAround::184-187 1 0.02% 99.98%
|
|
system.physmem.wrPerTurnAround::188-191 1 0.02% 100.00%
|
|
system.physmem.wrPerTurnAround::total 5793
|
|
system.physmem.totQLat 4571022000
|
|
system.physmem.totMemAccLat 7713015750
|
|
system.physmem.totBusLat 837865000
|
|
system.physmem.avgQLat 27277.80
|
|
system.physmem.avgBusLat 5000.00
|
|
system.physmem.avgMemAccLat 46027.80
|
|
system.physmem.avgRdBW 3.69
|
|
system.physmem.avgWrBW 2.61
|
|
system.physmem.avgRdBWSys 3.50
|
|
system.physmem.avgWrBWSys 2.61
|
|
system.physmem.peakBW 12800.00
|
|
system.physmem.busUtil 0.05
|
|
system.physmem.busUtilRead 0.03
|
|
system.physmem.busUtilWrite 0.02
|
|
system.physmem.avgRdQLen 1.00
|
|
system.physmem.avgWrQLen 24.59
|
|
system.physmem.readRowHits 138588
|
|
system.physmem.writeRowHits 89923
|
|
system.physmem.readRowHitRate 82.70
|
|
system.physmem.writeRowHitRate 75.79
|
|
system.physmem.avgGap 10010492.43
|
|
system.physmem.pageHitRate 79.84
|
|
system.physmem_0.actEnergy 209923140
|
|
system.physmem_0.preEnergy 111576795
|
|
system.physmem_0.readEnergy 639494100
|
|
system.physmem_0.writeEnergy 313387920
|
|
system.physmem_0.refreshEnergy 6670687920.000002
|
|
system.physmem_0.actBackEnergy 4809422880
|
|
system.physmem_0.preBackEnergy 413752800
|
|
system.physmem_0.actPowerDownEnergy 13946789640
|
|
system.physmem_0.prePowerDownEnergy 9398763360
|
|
system.physmem_0.selfRefreshEnergy 682626603840
|
|
system.physmem_0.totalEnergy 719142677895
|
|
system.physmem_0.averagePower 247.527383
|
|
system.physmem_0.totalIdleTime 2893152718000
|
|
system.physmem_0.memoryStateTime::IDLE 777067000
|
|
system.physmem_0.memoryStateTime::REF 2836732000
|
|
system.physmem_0.memoryStateTime::SREF 2838614964500
|
|
system.physmem_0.memoryStateTime::PRE_PDN 24475941750
|
|
system.physmem_0.memoryStateTime::ACT 8015385500
|
|
system.physmem_0.memoryStateTime::ACT_PDN 30585446750
|
|
system.physmem_1.actEnergy 202033440
|
|
system.physmem_1.preEnergy 107379525
|
|
system.physmem_1.readEnergy 556977120
|
|
system.physmem_1.writeEnergy 305886780
|
|
system.physmem_1.refreshEnergy 6674990400.000002
|
|
system.physmem_1.actBackEnergy 4528240170
|
|
system.physmem_1.preBackEnergy 413409600
|
|
system.physmem_1.actPowerDownEnergy 13646578620
|
|
system.physmem_1.prePowerDownEnergy 9540468000
|
|
system.physmem_1.selfRefreshEnergy 682917113460
|
|
system.physmem_1.totalEnergy 718894076985
|
|
system.physmem_1.averagePower 247.441816
|
|
system.physmem_1.totalIdleTime 2894296337500
|
|
system.physmem_1.memoryStateTime::IDLE 785533000
|
|
system.physmem_1.memoryStateTime::REF 2839260000
|
|
system.physmem_1.memoryStateTime::SREF 2839524651500
|
|
system.physmem_1.memoryStateTime::PRE_PDN 24844849250
|
|
system.physmem_1.memoryStateTime::ACT 7384341000
|
|
system.physmem_1.memoryStateTime::ACT_PDN 29926902750
|
|
system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.nvmem.bytes_read::cpu.inst 20
|
|
system.realview.nvmem.bytes_read::total 20
|
|
system.realview.nvmem.bytes_inst_read::cpu.inst 20
|
|
system.realview.nvmem.bytes_inst_read::total 20
|
|
system.realview.nvmem.num_reads::cpu.inst 5
|
|
system.realview.nvmem.num_reads::total 5
|
|
system.realview.nvmem.bw_read::cpu.inst 7
|
|
system.realview.nvmem.bw_read::total 7
|
|
system.realview.nvmem.bw_inst_read::cpu.inst 7
|
|
system.realview.nvmem.bw_inst_read::total 7
|
|
system.realview.nvmem.bw_total::cpu.inst 7
|
|
system.realview.nvmem.bw_total::total 7
|
|
system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.bridge.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.cf0.dma_read_full_pages 0
|
|
system.cf0.dma_read_bytes 1024
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system.cf0.dma_read_txs 1
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system.cf0.dma_write_full_pages 540
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system.cf0.dma_write_bytes 2318336
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system.cf0.dma_write_txs 631
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system.cpu_clk_domain.clock 500
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system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2905305537500
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system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
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system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
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system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0
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system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0
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system.cpu.dstage2_mmu.stage2_tlb.read_hits 0
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system.cpu.dstage2_mmu.stage2_tlb.read_misses 0
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system.cpu.dstage2_mmu.stage2_tlb.write_hits 0
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system.cpu.dstage2_mmu.stage2_tlb.write_misses 0
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system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0
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system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0
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system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
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system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0
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system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0
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system.cpu.dstage2_mmu.stage2_tlb.align_faults 0
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system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0
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system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0
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system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0
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system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0
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system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0
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system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0
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system.cpu.dstage2_mmu.stage2_tlb.hits 0
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system.cpu.dstage2_mmu.stage2_tlb.misses 0
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system.cpu.dstage2_mmu.stage2_tlb.accesses 0
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system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2905305537500
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system.cpu.dtb.walker.walks 9552
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system.cpu.dtb.walker.walksShort 9552
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system.cpu.dtb.walker.walksShortTerminationLevel::Level1 1256
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system.cpu.dtb.walker.walksShortTerminationLevel::Level2 8296
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system.cpu.dtb.walker.walkWaitTime::samples 9552
|
|
system.cpu.dtb.walker.walkWaitTime::0 9552 100.00% 100.00%
|
|
system.cpu.dtb.walker.walkWaitTime::total 9552
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|
system.cpu.dtb.walker.walkCompletionTime::samples 7388
|
|
system.cpu.dtb.walker.walkCompletionTime::mean 10012.994044
|
|
system.cpu.dtb.walker.walkCompletionTime::gmean 8463.653638
|
|
system.cpu.dtb.walker.walkCompletionTime::stdev 6610.616521
|
|
system.cpu.dtb.walker.walkCompletionTime::0-16383 6587 89.16% 89.16%
|
|
system.cpu.dtb.walker.walkCompletionTime::16384-32767 796 10.77% 99.93%
|
|
system.cpu.dtb.walker.walkCompletionTime::81920-98303 4 0.05% 99.99%
|
|
system.cpu.dtb.walker.walkCompletionTime::180224-196607 1 0.01% 100.00%
|
|
system.cpu.dtb.walker.walkCompletionTime::total 7388
|
|
system.cpu.dtb.walker.walksPending::samples 1003066500
|
|
system.cpu.dtb.walker.walksPending::0 1003066500 100.00% 100.00%
|
|
system.cpu.dtb.walker.walksPending::total 1003066500
|
|
system.cpu.dtb.walker.walkPageSizes::4K 6179 83.64% 83.64%
|
|
system.cpu.dtb.walker.walkPageSizes::1M 1209 16.36% 100.00%
|
|
system.cpu.dtb.walker.walkPageSizes::total 7388
|
|
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 9552
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|
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0
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|
system.cpu.dtb.walker.walkRequestOrigin_Requested::total 9552
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|
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 7388
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|
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0
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|
system.cpu.dtb.walker.walkRequestOrigin_Completed::total 7388
|
|
system.cpu.dtb.walker.walkRequestOrigin::total 16940
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system.cpu.dtb.inst_hits 0
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system.cpu.dtb.inst_misses 0
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system.cpu.dtb.read_hits 24517545
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system.cpu.dtb.read_misses 8139
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|
system.cpu.dtb.write_hits 19603622
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|
system.cpu.dtb.write_misses 1413
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|
system.cpu.dtb.flush_tlb 64
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|
system.cpu.dtb.flush_tlb_mva 917
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system.cpu.dtb.flush_tlb_mva_asid 0
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system.cpu.dtb.flush_tlb_asid 0
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system.cpu.dtb.flush_entries 4209
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system.cpu.dtb.align_faults 0
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system.cpu.dtb.prefetch_faults 1622
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system.cpu.dtb.domain_faults 0
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|
system.cpu.dtb.perms_faults 445
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|
system.cpu.dtb.read_accesses 24525684
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|
system.cpu.dtb.write_accesses 19605035
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|
system.cpu.dtb.inst_accesses 0
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system.cpu.dtb.hits 44121167
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system.cpu.dtb.misses 9552
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system.cpu.dtb.accesses 44130719
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|
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2905305537500
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|
system.cpu.istage2_mmu.stage2_tlb.walker.walks 0
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|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
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system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
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system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
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system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
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|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
|
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system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
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|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
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system.cpu.istage2_mmu.stage2_tlb.inst_hits 0
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|
system.cpu.istage2_mmu.stage2_tlb.inst_misses 0
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|
system.cpu.istage2_mmu.stage2_tlb.read_hits 0
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system.cpu.istage2_mmu.stage2_tlb.read_misses 0
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system.cpu.istage2_mmu.stage2_tlb.write_hits 0
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system.cpu.istage2_mmu.stage2_tlb.write_misses 0
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system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0
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|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0
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|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
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system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0
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system.cpu.istage2_mmu.stage2_tlb.flush_entries 0
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system.cpu.istage2_mmu.stage2_tlb.align_faults 0
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system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0
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|
system.cpu.istage2_mmu.stage2_tlb.domain_faults 0
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|
system.cpu.istage2_mmu.stage2_tlb.perms_faults 0
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system.cpu.istage2_mmu.stage2_tlb.read_accesses 0
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system.cpu.istage2_mmu.stage2_tlb.write_accesses 0
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system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0
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system.cpu.istage2_mmu.stage2_tlb.hits 0
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system.cpu.istage2_mmu.stage2_tlb.misses 0
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system.cpu.istage2_mmu.stage2_tlb.accesses 0
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system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2905305537500
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|
system.cpu.itb.walker.walks 4763
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|
system.cpu.itb.walker.walksShort 4763
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|
system.cpu.itb.walker.walksShortTerminationLevel::Level1 310
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|
system.cpu.itb.walker.walksShortTerminationLevel::Level2 4453
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|
system.cpu.itb.walker.walkWaitTime::samples 4763
|
|
system.cpu.itb.walker.walkWaitTime::0 4763 100.00% 100.00%
|
|
system.cpu.itb.walker.walkWaitTime::total 4763
|
|
system.cpu.itb.walker.walkCompletionTime::samples 3108
|
|
system.cpu.itb.walker.walkCompletionTime::mean 10180.019305
|
|
system.cpu.itb.walker.walkCompletionTime::gmean 8231.944722
|
|
system.cpu.itb.walker.walkCompletionTime::stdev 7310.859984
|
|
system.cpu.itb.walker.walkCompletionTime::0-8191 1821 58.59% 58.59%
|
|
system.cpu.itb.walker.walkCompletionTime::8192-16383 761 24.49% 83.08%
|
|
system.cpu.itb.walker.walkCompletionTime::16384-24575 524 16.86% 99.94%
|
|
system.cpu.itb.walker.walkCompletionTime::90112-98303 1 0.03% 99.97%
|
|
system.cpu.itb.walker.walkCompletionTime::98304-106495 1 0.03% 100.00%
|
|
system.cpu.itb.walker.walkCompletionTime::total 3108
|
|
system.cpu.itb.walker.walksPending::samples 1002711000
|
|
system.cpu.itb.walker.walksPending::0 1002711000 100.00% 100.00%
|
|
system.cpu.itb.walker.walksPending::total 1002711000
|
|
system.cpu.itb.walker.walkPageSizes::4K 2798 90.03% 90.03%
|
|
system.cpu.itb.walker.walkPageSizes::1M 310 9.97% 100.00%
|
|
system.cpu.itb.walker.walkPageSizes::total 3108
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 4763
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::total 4763
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 3108
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::total 3108
|
|
system.cpu.itb.walker.walkRequestOrigin::total 7871
|
|
system.cpu.itb.inst_hits 115547653
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|
system.cpu.itb.inst_misses 4763
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|
system.cpu.itb.read_hits 0
|
|
system.cpu.itb.read_misses 0
|
|
system.cpu.itb.write_hits 0
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|
system.cpu.itb.write_misses 0
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|
system.cpu.itb.flush_tlb 64
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|
system.cpu.itb.flush_tlb_mva 917
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|
system.cpu.itb.flush_tlb_mva_asid 0
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|
system.cpu.itb.flush_tlb_asid 0
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|
system.cpu.itb.flush_entries 2849
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|
system.cpu.itb.align_faults 0
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|
system.cpu.itb.prefetch_faults 0
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|
system.cpu.itb.domain_faults 0
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|
system.cpu.itb.perms_faults 0
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|
system.cpu.itb.read_accesses 0
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|
system.cpu.itb.write_accesses 0
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system.cpu.itb.inst_accesses 115552416
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|
system.cpu.itb.hits 115547653
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|
system.cpu.itb.misses 4763
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|
system.cpu.itb.accesses 115552416
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|
system.cpu.numPwrStateTransitions 6064
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|
system.cpu.pwrStateClkGateDist::samples 3032
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|
system.cpu.pwrStateClkGateDist::mean 887476232.352243
|
|
system.cpu.pwrStateClkGateDist::stdev 17466728085.198059
|
|
system.cpu.pwrStateClkGateDist::underflows 2968 97.89% 97.89%
|
|
system.cpu.pwrStateClkGateDist::1000-5e+10 58 1.91% 99.80%
|
|
system.cpu.pwrStateClkGateDist::1.5e+11-2e+11 1 0.03% 99.84%
|
|
system.cpu.pwrStateClkGateDist::2e+11-2.5e+11 1 0.03% 99.87%
|
|
system.cpu.pwrStateClkGateDist::2.5e+11-3e+11 1 0.03% 99.90%
|
|
system.cpu.pwrStateClkGateDist::4.5e+11-5e+11 3 0.10% 100.00%
|
|
system.cpu.pwrStateClkGateDist::min_value 501
|
|
system.cpu.pwrStateClkGateDist::max_value 499964549884
|
|
system.cpu.pwrStateClkGateDist::total 3032
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|
system.cpu.pwrStateResidencyTicks::ON 214477601008
|
|
system.cpu.pwrStateResidencyTicks::CLK_GATED 2690827936492
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|
system.cpu.numCycles 5810611075
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|
system.cpu.numWorkItemsStarted 0
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|
system.cpu.numWorkItemsCompleted 0
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|
system.cpu.kern.inst.arm 0
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|
system.cpu.kern.inst.quiesce 3032
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|
system.cpu.committedInsts 112449853
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|
system.cpu.committedOps 135579871
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|
system.cpu.num_int_alu_accesses 119885571
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|
system.cpu.num_fp_alu_accesses 11290
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|
system.cpu.num_func_calls 9894238
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|
system.cpu.num_conditional_control_insts 15230085
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|
system.cpu.num_int_insts 119885571
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|
system.cpu.num_fp_insts 11290
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|
system.cpu.num_int_register_reads 218040023
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|
system.cpu.num_int_register_writes 82640385
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|
system.cpu.num_fp_register_reads 8578
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|
system.cpu.num_fp_register_writes 2716
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|
system.cpu.num_cc_register_reads 489710218
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|
system.cpu.num_cc_register_writes 51892450
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|
system.cpu.num_mem_refs 45401283
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|
system.cpu.num_load_insts 24839682
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|
system.cpu.num_store_insts 20561601
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|
system.cpu.num_idle_cycles 5381655872.982148
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|
system.cpu.num_busy_cycles 428955202.017852
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|
system.cpu.not_idle_fraction 0.073823
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|
system.cpu.idle_fraction 0.926177
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|
system.cpu.Branches 25918317
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|
system.cpu.op_class::No_OpClass 2337 0.00% 0.00%
|
|
system.cpu.op_class::IntAlu 93173741 67.18% 67.18%
|
|
system.cpu.op_class::IntMult 114521 0.08% 67.26%
|
|
system.cpu.op_class::IntDiv 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatAdd 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatCmp 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatCvt 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatMult 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatMultAcc 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatDiv 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatMisc 0 0.00% 67.26%
|
|
system.cpu.op_class::FloatSqrt 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdAdd 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdAddAcc 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdAlu 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdCmp 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdCvt 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdMisc 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdMult 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdMultAcc 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdShift 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdShiftAcc 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdSqrt 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatAdd 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatAlu 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatCmp 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatCvt 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatDiv 0 0.00% 67.26%
|
|
system.cpu.op_class::SimdFloatMisc 8435 0.01% 67.27%
|
|
system.cpu.op_class::SimdFloatMult 0 0.00% 67.27%
|
|
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.27%
|
|
system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.27%
|
|
system.cpu.op_class::MemRead 24836974 17.91% 85.17%
|
|
system.cpu.op_class::MemWrite 20553023 14.82% 99.99%
|
|
system.cpu.op_class::FloatMemRead 2708 0.00% 99.99%
|
|
system.cpu.op_class::FloatMemWrite 8578 0.01% 100.00%
|
|
system.cpu.op_class::IprAccess 0 0.00% 100.00%
|
|
system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
|
|
system.cpu.op_class::total 138700317
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|
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2905305537500
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|
system.cpu.dcache.tags.replacements 821089
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|
system.cpu.dcache.tags.tagsinuse 511.816170
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|
system.cpu.dcache.tags.total_refs 43228313
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|
system.cpu.dcache.tags.sampled_refs 821601
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|
system.cpu.dcache.tags.avg_refs 52.614728
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|
system.cpu.dcache.tags.warmup_cycle 1078145500
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|
system.cpu.dcache.tags.occ_blocks::cpu.data 511.816170
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|
system.cpu.dcache.tags.occ_percent::cpu.data 0.999641
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|
system.cpu.dcache.tags.occ_percent::total 0.999641
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|
system.cpu.dcache.tags.occ_task_id_blocks::1024 512
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|
system.cpu.dcache.tags.age_task_id_blocks_1024::0 59
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|
system.cpu.dcache.tags.age_task_id_blocks_1024::1 356
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|
system.cpu.dcache.tags.age_task_id_blocks_1024::2 96
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|
system.cpu.dcache.tags.age_task_id_blocks_1024::3 1
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|
system.cpu.dcache.tags.occ_task_id_percent::1024 1
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|
system.cpu.dcache.tags.tag_accesses 177089446
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|
system.cpu.dcache.tags.data_accesses 177089446
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|
system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 2905305537500
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|
system.cpu.dcache.ReadReq_hits::cpu.data 23108878
|
|
system.cpu.dcache.ReadReq_hits::total 23108878
|
|
system.cpu.dcache.WriteReq_hits::cpu.data 18821001
|
|
system.cpu.dcache.WriteReq_hits::total 18821001
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|
system.cpu.dcache.SoftPFReq_hits::cpu.data 392443
|
|
system.cpu.dcache.SoftPFReq_hits::total 392443
|
|
system.cpu.dcache.LoadLockedReq_hits::cpu.data 443073
|
|
system.cpu.dcache.LoadLockedReq_hits::total 443073
|
|
system.cpu.dcache.StoreCondReq_hits::cpu.data 460108
|
|
system.cpu.dcache.StoreCondReq_hits::total 460108
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|
system.cpu.dcache.demand_hits::cpu.data 41929879
|
|
system.cpu.dcache.demand_hits::total 41929879
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|
system.cpu.dcache.overall_hits::cpu.data 42322322
|
|
system.cpu.dcache.overall_hits::total 42322322
|
|
system.cpu.dcache.ReadReq_misses::cpu.data 401094
|
|
system.cpu.dcache.ReadReq_misses::total 401094
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|
system.cpu.dcache.WriteReq_misses::cpu.data 298865
|
|
system.cpu.dcache.WriteReq_misses::total 298865
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|
system.cpu.dcache.SoftPFReq_misses::cpu.data 118684
|
|
system.cpu.dcache.SoftPFReq_misses::total 118684
|
|
system.cpu.dcache.LoadLockedReq_misses::cpu.data 22806
|
|
system.cpu.dcache.LoadLockedReq_misses::total 22806
|
|
system.cpu.dcache.StoreCondReq_misses::cpu.data 2
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|
system.cpu.dcache.StoreCondReq_misses::total 2
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|
system.cpu.dcache.demand_misses::cpu.data 699959
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|
system.cpu.dcache.demand_misses::total 699959
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|
system.cpu.dcache.overall_misses::cpu.data 818643
|
|
system.cpu.dcache.overall_misses::total 818643
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|
system.cpu.dcache.ReadReq_miss_latency::cpu.data 6435554000
|
|
system.cpu.dcache.ReadReq_miss_latency::total 6435554000
|
|
system.cpu.dcache.WriteReq_miss_latency::cpu.data 14440564500
|
|
system.cpu.dcache.WriteReq_miss_latency::total 14440564500
|
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|
|
system.cpu.toL2Bus.trans_dist::WriteReq 27579
|
|
system.cpu.toL2Bus.trans_dist::WriteResp 27579
|
|
system.cpu.toL2Bus.trans_dist::WritebackDirty 767530
|
|
system.cpu.toL2Bus.trans_dist::WritebackClean 1699808
|
|
system.cpu.toL2Bus.trans_dist::CleanEvict 142156
|
|
system.cpu.toL2Bus.trans_dist::UpgradeReq 2808
|
|
system.cpu.toL2Bus.trans_dist::SCUpgradeReq 2
|
|
system.cpu.toL2Bus.trans_dist::UpgradeResp 2810
|
|
system.cpu.toL2Bus.trans_dist::ReadExReq 296057
|
|
system.cpu.toL2Bus.trans_dist::ReadExResp 296057
|
|
system.cpu.toL2Bus.trans_dist::ReadCleanReq 1700326
|
|
system.cpu.toL2Bus.trans_dist::ReadSharedReq 525772
|
|
system.cpu.toL2Bus.trans_dist::InvalidateReq 4351
|
|
system.cpu.toL2Bus.trans_dist::InvalidateResp 14
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5118487
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2587568
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 11902
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 22917
|
|
system.cpu.toL2Bus.pkt_count::total 7740874
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 217643576
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 96655427
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 10744
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 20276
|
|
system.cpu.toL2Bus.pkt_size::total 314330023
|
|
system.cpu.toL2Bus.snoops 112678
|
|
system.cpu.toL2Bus.snoopTraffic 5336628
|
|
system.cpu.toL2Bus.snoop_fanout::samples 2712696
|
|
system.cpu.toL2Bus.snoop_fanout::mean 0.021694
|
|
system.cpu.toL2Bus.snoop_fanout::stdev 0.145681
|
|
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
|
|
system.cpu.toL2Bus.snoop_fanout::0 2653848 97.83% 97.83%
|
|
system.cpu.toL2Bus.snoop_fanout::1 58848 2.17% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::min_value 0
|
|
system.cpu.toL2Bus.snoop_fanout::max_value 1
|
|
system.cpu.toL2Bus.snoop_fanout::total 2712696
|
|
system.cpu.toL2Bus.reqLayer0.occupancy 4969380500
|
|
system.cpu.toL2Bus.reqLayer0.utilization 0.2
|
|
system.cpu.toL2Bus.snoopLayer0.occupancy 354876
|
|
system.cpu.toL2Bus.snoopLayer0.utilization 0.0
|
|
system.cpu.toL2Bus.respLayer0.occupancy 2559511000
|
|
system.cpu.toL2Bus.respLayer0.utilization 0.1
|
|
system.cpu.toL2Bus.respLayer1.occupancy 1278757500
|
|
system.cpu.toL2Bus.respLayer1.utilization 0.0
|
|
system.cpu.toL2Bus.respLayer2.occupancy 9216000
|
|
system.cpu.toL2Bus.respLayer2.utilization 0.0
|
|
system.cpu.toL2Bus.respLayer3.occupancy 17848000
|
|
system.cpu.toL2Bus.respLayer3.utilization 0.0
|
|
system.iobus.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.iobus.trans_dist::ReadReq 30149
|
|
system.iobus.trans_dist::ReadResp 30149
|
|
system.iobus.trans_dist::WriteReq 59014
|
|
system.iobus.trans_dist::WriteResp 59014
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 54170
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 116
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.pci_host.pio 434
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 34
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 20
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 120
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 834
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 32
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.uart1_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.uart2_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.uart3_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.sp810_fake.pio 76
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.watchdog_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.aaci_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.lan_fake.pio 4
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.usb_fake.pio 10
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.ide.pio 7244
|
|
system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio 42268
|
|
system.iobus.pkt_count_system.bridge.master::total 105458
|
|
system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 72868
|
|
system.iobus.pkt_count_system.realview.ide.dma::total 72868
|
|
system.iobus.pkt_count::total 178326
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 67887
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 232
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.pci_host.pio 638
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.timer0.pio 68
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.timer1.pio 40
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.kmi0.pio 84
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.kmi1.pio 441
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.rtc.pio 64
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.uart1_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.uart2_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.uart3_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.sp810_fake.pio 152
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.watchdog_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.aaci_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.lan_fake.pio 8
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.usb_fake.pio 20
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.ide.pio 4753
|
|
system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio 84536
|
|
system.iobus.pkt_size_system.bridge.master::total 159115
|
|
system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2320912
|
|
system.iobus.pkt_size_system.realview.ide.dma::total 2320912
|
|
system.iobus.pkt_size::total 2480027
|
|
system.iobus.reqLayer0.occupancy 46336500
|
|
system.iobus.reqLayer0.utilization 0.0
|
|
system.iobus.reqLayer1.occupancy 97000
|
|
system.iobus.reqLayer1.utilization 0.0
|
|
system.iobus.reqLayer2.occupancy 338000
|
|
system.iobus.reqLayer2.utilization 0.0
|
|
system.iobus.reqLayer3.occupancy 29500
|
|
system.iobus.reqLayer3.utilization 0.0
|
|
system.iobus.reqLayer4.occupancy 15500
|
|
system.iobus.reqLayer4.utilization 0.0
|
|
system.iobus.reqLayer7.occupancy 91500
|
|
system.iobus.reqLayer7.utilization 0.0
|
|
system.iobus.reqLayer8.occupancy 630500
|
|
system.iobus.reqLayer8.utilization 0.0
|
|
system.iobus.reqLayer10.occupancy 21000
|
|
system.iobus.reqLayer10.utilization 0.0
|
|
system.iobus.reqLayer13.occupancy 11500
|
|
system.iobus.reqLayer13.utilization 0.0
|
|
system.iobus.reqLayer14.occupancy 12000
|
|
system.iobus.reqLayer14.utilization 0.0
|
|
system.iobus.reqLayer15.occupancy 12000
|
|
system.iobus.reqLayer15.utilization 0.0
|
|
system.iobus.reqLayer16.occupancy 52500
|
|
system.iobus.reqLayer16.utilization 0.0
|
|
system.iobus.reqLayer17.occupancy 12000
|
|
system.iobus.reqLayer17.utilization 0.0
|
|
system.iobus.reqLayer18.occupancy 11500
|
|
system.iobus.reqLayer18.utilization 0.0
|
|
system.iobus.reqLayer19.occupancy 2000
|
|
system.iobus.reqLayer19.utilization 0.0
|
|
system.iobus.reqLayer20.occupancy 9000
|
|
system.iobus.reqLayer20.utilization 0.0
|
|
system.iobus.reqLayer21.occupancy 11500
|
|
system.iobus.reqLayer21.utilization 0.0
|
|
system.iobus.reqLayer23.occupancy 6289000
|
|
system.iobus.reqLayer23.utilization 0.0
|
|
system.iobus.reqLayer24.occupancy 36469500
|
|
system.iobus.reqLayer24.utilization 0.0
|
|
system.iobus.reqLayer25.occupancy 187505138
|
|
system.iobus.reqLayer25.utilization 0.0
|
|
system.iobus.respLayer0.occupancy 82668000
|
|
system.iobus.respLayer0.utilization 0.0
|
|
system.iobus.respLayer3.occupancy 36692000
|
|
system.iobus.respLayer3.utilization 0.0
|
|
system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.iocache.tags.replacements 36400
|
|
system.iocache.tags.tagsinuse 1.079831
|
|
system.iocache.tags.total_refs 0
|
|
system.iocache.tags.sampled_refs 36416
|
|
system.iocache.tags.avg_refs 0
|
|
system.iocache.tags.warmup_cycle 310617748000
|
|
system.iocache.tags.occ_blocks::realview.ide 1.079831
|
|
system.iocache.tags.occ_percent::realview.ide 0.067489
|
|
system.iocache.tags.occ_percent::total 0.067489
|
|
system.iocache.tags.occ_task_id_blocks::1023 16
|
|
system.iocache.tags.age_task_id_blocks_1023::3 16
|
|
system.iocache.tags.occ_task_id_percent::1023 1
|
|
system.iocache.tags.tag_accesses 327906
|
|
system.iocache.tags.data_accesses 327906
|
|
system.iocache.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.iocache.ReadReq_misses::realview.ide 210
|
|
system.iocache.ReadReq_misses::total 210
|
|
system.iocache.WriteLineReq_misses::realview.ide 36224
|
|
system.iocache.WriteLineReq_misses::total 36224
|
|
system.iocache.demand_misses::realview.ide 36434
|
|
system.iocache.demand_misses::total 36434
|
|
system.iocache.overall_misses::realview.ide 36434
|
|
system.iocache.overall_misses::total 36434
|
|
system.iocache.ReadReq_miss_latency::realview.ide 34066376
|
|
system.iocache.ReadReq_miss_latency::total 34066376
|
|
system.iocache.WriteLineReq_miss_latency::realview.ide 4376106762
|
|
system.iocache.WriteLineReq_miss_latency::total 4376106762
|
|
system.iocache.demand_miss_latency::realview.ide 4410173138
|
|
system.iocache.demand_miss_latency::total 4410173138
|
|
system.iocache.overall_miss_latency::realview.ide 4410173138
|
|
system.iocache.overall_miss_latency::total 4410173138
|
|
system.iocache.ReadReq_accesses::realview.ide 210
|
|
system.iocache.ReadReq_accesses::total 210
|
|
system.iocache.WriteLineReq_accesses::realview.ide 36224
|
|
system.iocache.WriteLineReq_accesses::total 36224
|
|
system.iocache.demand_accesses::realview.ide 36434
|
|
system.iocache.demand_accesses::total 36434
|
|
system.iocache.overall_accesses::realview.ide 36434
|
|
system.iocache.overall_accesses::total 36434
|
|
system.iocache.ReadReq_miss_rate::realview.ide 1
|
|
system.iocache.ReadReq_miss_rate::total 1
|
|
system.iocache.WriteLineReq_miss_rate::realview.ide 1
|
|
system.iocache.WriteLineReq_miss_rate::total 1
|
|
system.iocache.demand_miss_rate::realview.ide 1
|
|
system.iocache.demand_miss_rate::total 1
|
|
system.iocache.overall_miss_rate::realview.ide 1
|
|
system.iocache.overall_miss_rate::total 1
|
|
system.iocache.ReadReq_avg_miss_latency::realview.ide 162220.838095
|
|
system.iocache.ReadReq_avg_miss_latency::total 162220.838095
|
|
system.iocache.WriteLineReq_avg_miss_latency::realview.ide 120806.834198
|
|
system.iocache.WriteLineReq_avg_miss_latency::total 120806.834198
|
|
system.iocache.demand_avg_miss_latency::realview.ide 121045.538179
|
|
system.iocache.demand_avg_miss_latency::total 121045.538179
|
|
system.iocache.overall_avg_miss_latency::realview.ide 121045.538179
|
|
system.iocache.overall_avg_miss_latency::total 121045.538179
|
|
system.iocache.blocked_cycles::no_mshrs 208
|
|
system.iocache.blocked_cycles::no_targets 0
|
|
system.iocache.blocked::no_mshrs 4
|
|
system.iocache.blocked::no_targets 0
|
|
system.iocache.avg_blocked_cycles::no_mshrs 52
|
|
system.iocache.avg_blocked_cycles::no_targets nan
|
|
system.iocache.writebacks::writebacks 36190
|
|
system.iocache.writebacks::total 36190
|
|
system.iocache.ReadReq_mshr_misses::realview.ide 210
|
|
system.iocache.ReadReq_mshr_misses::total 210
|
|
system.iocache.WriteLineReq_mshr_misses::realview.ide 36224
|
|
system.iocache.WriteLineReq_mshr_misses::total 36224
|
|
system.iocache.demand_mshr_misses::realview.ide 36434
|
|
system.iocache.demand_mshr_misses::total 36434
|
|
system.iocache.overall_mshr_misses::realview.ide 36434
|
|
system.iocache.overall_mshr_misses::total 36434
|
|
system.iocache.ReadReq_mshr_miss_latency::realview.ide 23566376
|
|
system.iocache.ReadReq_mshr_miss_latency::total 23566376
|
|
system.iocache.WriteLineReq_mshr_miss_latency::realview.ide 2563140504
|
|
system.iocache.WriteLineReq_mshr_miss_latency::total 2563140504
|
|
system.iocache.demand_mshr_miss_latency::realview.ide 2586706880
|
|
system.iocache.demand_mshr_miss_latency::total 2586706880
|
|
system.iocache.overall_mshr_miss_latency::realview.ide 2586706880
|
|
system.iocache.overall_mshr_miss_latency::total 2586706880
|
|
system.iocache.ReadReq_mshr_miss_rate::realview.ide 1
|
|
system.iocache.ReadReq_mshr_miss_rate::total 1
|
|
system.iocache.WriteLineReq_mshr_miss_rate::realview.ide 1
|
|
system.iocache.WriteLineReq_mshr_miss_rate::total 1
|
|
system.iocache.demand_mshr_miss_rate::realview.ide 1
|
|
system.iocache.demand_mshr_miss_rate::total 1
|
|
system.iocache.overall_mshr_miss_rate::realview.ide 1
|
|
system.iocache.overall_mshr_miss_rate::total 1
|
|
system.iocache.ReadReq_avg_mshr_miss_latency::realview.ide 112220.838095
|
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 112220.838095
|
|
system.iocache.WriteLineReq_avg_mshr_miss_latency::realview.ide 70758.074867
|
|
system.iocache.WriteLineReq_avg_mshr_miss_latency::total 70758.074867
|
|
system.iocache.demand_avg_mshr_miss_latency::realview.ide 70997.059889
|
|
system.iocache.demand_avg_mshr_miss_latency::total 70997.059889
|
|
system.iocache.overall_avg_mshr_miss_latency::realview.ide 70997.059889
|
|
system.iocache.overall_avg_mshr_miss_latency::total 70997.059889
|
|
system.membus.snoop_filter.tot_requests 319999
|
|
system.membus.snoop_filter.hit_single_requests 129537
|
|
system.membus.snoop_filter.hit_multi_requests 496
|
|
system.membus.snoop_filter.tot_snoops 0
|
|
system.membus.snoop_filter.hit_single_snoops 0
|
|
system.membus.snoop_filter.hit_multi_snoops 0
|
|
system.membus.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.membus.trans_dist::ReadReq 40140
|
|
system.membus.trans_dist::ReadResp 70408
|
|
system.membus.trans_dist::WriteReq 27579
|
|
system.membus.trans_dist::WriteResp 27579
|
|
system.membus.trans_dist::WritebackDirty 118160
|
|
system.membus.trans_dist::CleanEvict 6837
|
|
system.membus.trans_dist::UpgradeReq 128
|
|
system.membus.trans_dist::SCUpgradeReq 2
|
|
system.membus.trans_dist::UpgradeResp 2
|
|
system.membus.trans_dist::ReadExReq 128317
|
|
system.membus.trans_dist::ReadExResp 128317
|
|
system.membus.trans_dist::ReadSharedReq 30268
|
|
system.membus.trans_dist::InvalidateReq 36224
|
|
system.membus.trans_dist::InvalidateResp 4315
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 105458
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 2064
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 433106
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::total 540638
|
|
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 72849
|
|
system.membus.pkt_count_system.iocache.mem_side::total 72849
|
|
system.membus.pkt_count::total 613487
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 159115
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 4128
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15420220
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::total 15583483
|
|
system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2317120
|
|
system.membus.pkt_size_system.iocache.mem_side::total 2317120
|
|
system.membus.pkt_size::total 17900603
|
|
system.membus.snoops 4789
|
|
system.membus.snoopTraffic 30208
|
|
system.membus.snoop_fanout::samples 262658
|
|
system.membus.snoop_fanout::mean 0.018385
|
|
system.membus.snoop_fanout::stdev 0.134340
|
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00%
|
|
system.membus.snoop_fanout::0 257829 98.16% 98.16%
|
|
system.membus.snoop_fanout::1 4829 1.84% 100.00%
|
|
system.membus.snoop_fanout::2 0 0.00% 100.00%
|
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00%
|
|
system.membus.snoop_fanout::min_value 0
|
|
system.membus.snoop_fanout::max_value 1
|
|
system.membus.snoop_fanout::total 262658
|
|
system.membus.reqLayer0.occupancy 90452000
|
|
system.membus.reqLayer0.utilization 0.0
|
|
system.membus.reqLayer1.occupancy 7500
|
|
system.membus.reqLayer1.utilization 0.0
|
|
system.membus.reqLayer2.occupancy 1690500
|
|
system.membus.reqLayer2.utilization 0.0
|
|
system.membus.reqLayer5.occupancy 822823297
|
|
system.membus.reqLayer5.utilization 0.0
|
|
system.membus.respLayer2.occupancy 948595750
|
|
system.membus.respLayer2.utilization 0.0
|
|
system.membus.respLayer3.occupancy 5614930
|
|
system.membus.respLayer3.utilization 0.0
|
|
system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.dcc.osc_cpu.clock 16667
|
|
system.realview.dcc.osc_ddr.clock 25000
|
|
system.realview.dcc.osc_hsbm.clock 25000
|
|
system.realview.dcc.osc_pxl.clock 42105
|
|
system.realview.dcc.osc_smb.clock 20000
|
|
system.realview.dcc.osc_sys.clock 16667
|
|
system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.ethernet.descDMAReads 0
|
|
system.realview.ethernet.descDMAWrites 0
|
|
system.realview.ethernet.descDmaReadBytes 0
|
|
system.realview.ethernet.descDmaWriteBytes 0
|
|
system.realview.ethernet.postedSwi 0
|
|
system.realview.ethernet.coalescedSwi nan
|
|
system.realview.ethernet.totalSwi 0
|
|
system.realview.ethernet.postedRxIdle 0
|
|
system.realview.ethernet.coalescedRxIdle nan
|
|
system.realview.ethernet.totalRxIdle 0
|
|
system.realview.ethernet.postedRxOk 0
|
|
system.realview.ethernet.coalescedRxOk nan
|
|
system.realview.ethernet.totalRxOk 0
|
|
system.realview.ethernet.postedRxDesc 0
|
|
system.realview.ethernet.coalescedRxDesc nan
|
|
system.realview.ethernet.totalRxDesc 0
|
|
system.realview.ethernet.postedTxOk 0
|
|
system.realview.ethernet.coalescedTxOk nan
|
|
system.realview.ethernet.totalTxOk 0
|
|
system.realview.ethernet.postedTxIdle 0
|
|
system.realview.ethernet.coalescedTxIdle nan
|
|
system.realview.ethernet.totalTxIdle 0
|
|
system.realview.ethernet.postedTxDesc 0
|
|
system.realview.ethernet.coalescedTxDesc nan
|
|
system.realview.ethernet.totalTxDesc 0
|
|
system.realview.ethernet.postedRxOrn 0
|
|
system.realview.ethernet.coalescedRxOrn nan
|
|
system.realview.ethernet.totalRxOrn 0
|
|
system.realview.ethernet.coalescedTotal nan
|
|
system.realview.ethernet.postedInterrupts 0
|
|
system.realview.ethernet.droppedPackets 0
|
|
system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.mcc.osc_clcd.clock 42105
|
|
system.realview.mcc.osc_mcc.clock 20000
|
|
system.realview.mcc.osc_peripheral.clock 41667
|
|
system.realview.mcc.osc_system_bus.clock 41667
|
|
system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2905305537500
|
|
|
|
---------- End Simulation Statistics ----------
|