5df96cb690
This patch cleans up the packet memory allocation confusion. The data is always allocated at the requesting side, when a packet is created (or copied), and there is never a need for any device to allocate any space if it is merely responding to a paket. This behaviour is in line with how SystemC and TLM works as well, thus increasing interoperability, and matching established conventions. The redundant calls to Packet::allocate are removed, and the checks in the function are tightened up to make sure data is only ever allocated once. There are still some oddities in the packet copy constructor where we copy the data pointer if it is static (without ownership), and allocate new space if the data is dynamic (with ownership). The latter is being worked on further in a follow-on patch.
287 lines
8.5 KiB
C++
287 lines
8.5 KiB
C++
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include "base/intmath.hh"
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#include "base/trace.hh"
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#include "debug/Checkpoint.hh"
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#include "debug/Timer.hh"
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#include "dev/arm/base_gic.hh"
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#include "dev/arm/timer_sp804.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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Sp804::Sp804(Params *p)
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: AmbaPioDevice(p, 0xfff), gic(p->gic),
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timer0(name() + ".timer0", this, p->int_num0, p->clock0),
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timer1(name() + ".timer1", this, p->int_num1, p->clock1)
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{
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}
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Sp804::Timer::Timer(std::string __name, Sp804 *_parent, int int_num, Tick _clock)
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: _name(__name), parent(_parent), intNum(int_num), clock(_clock), control(0x20),
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rawInt(false), pendingInt(false), loadValue(0xffffffff), zeroEvent(this)
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{
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}
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Tick
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Sp804::read(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
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assert(pkt->getSize() == 4);
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Addr daddr = pkt->getAddr() - pioAddr;
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DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr);
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if (daddr < Timer::Size)
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timer0.read(pkt, daddr);
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else if ((daddr - Timer::Size) < Timer::Size)
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timer1.read(pkt, daddr - Timer::Size);
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else if (!readId(pkt, ambaId, pioAddr))
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panic("Tried to read SP804 at offset %#x that doesn't exist\n", daddr);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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void
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Sp804::Timer::read(PacketPtr pkt, Addr daddr)
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{
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switch(daddr) {
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case LoadReg:
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pkt->set<uint32_t>(loadValue);
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break;
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case CurrentReg:
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DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n",
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zeroEvent.when(), clock, control.timerPrescale);
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Tick time;
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time = zeroEvent.when() - curTick();
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time = time / clock / power(16, control.timerPrescale);
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DPRINTF(Timer, "-- returning counter at %d\n", time);
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pkt->set<uint32_t>(time);
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break;
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case ControlReg:
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pkt->set<uint32_t>(control);
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break;
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case RawISR:
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pkt->set<uint32_t>(rawInt);
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break;
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case MaskedISR:
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pkt->set<uint32_t>(pendingInt);
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break;
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case BGLoad:
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pkt->set<uint32_t>(loadValue);
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break;
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default:
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panic("Tried to read SP804 timer at offset %#x\n", daddr);
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break;
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}
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DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr);
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}
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Tick
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Sp804::write(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
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assert(pkt->getSize() == 4);
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Addr daddr = pkt->getAddr() - pioAddr;
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DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr);
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if (daddr < Timer::Size)
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timer0.write(pkt, daddr);
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else if ((daddr - Timer::Size) < Timer::Size)
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timer1.write(pkt, daddr - Timer::Size);
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else if (!readId(pkt, ambaId, pioAddr))
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panic("Tried to write SP804 at offset %#x that doesn't exist\n", daddr);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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void
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Sp804::Timer::write(PacketPtr pkt, Addr daddr)
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{
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DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr);
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switch (daddr) {
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case LoadReg:
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loadValue = pkt->get<uint32_t>();
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restartCounter(loadValue);
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break;
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case CurrentReg:
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// Spec says this value can't be written, but linux writes it anyway
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break;
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case ControlReg:
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bool old_enable;
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old_enable = control.timerEnable;
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control = pkt->get<uint32_t>();
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if ((old_enable == 0) && control.timerEnable)
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restartCounter(loadValue);
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break;
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case IntClear:
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rawInt = false;
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if (pendingInt) {
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pendingInt = false;
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DPRINTF(Timer, "Clearing interrupt\n");
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parent->gic->clearInt(intNum);
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}
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break;
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case BGLoad:
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loadValue = pkt->get<uint32_t>();
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break;
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default:
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panic("Tried to write SP804 timer at offset %#x\n", daddr);
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break;
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}
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}
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void
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Sp804::Timer::restartCounter(uint32_t val)
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{
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DPRINTF(Timer, "Resetting counter with value %#x\n", val);
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if (!control.timerEnable)
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return;
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Tick time = clock * power(16, control.timerPrescale);
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if (control.timerSize)
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time *= val;
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else
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time *= bits(val,15,0);
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if (zeroEvent.scheduled()) {
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DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
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parent->deschedule(zeroEvent);
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}
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parent->schedule(zeroEvent, curTick() + time);
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DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time);
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}
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void
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Sp804::Timer::counterAtZero()
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{
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if (!control.timerEnable)
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return;
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DPRINTF(Timer, "Counter reached zero\n");
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rawInt = true;
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bool old_pending = pendingInt;
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if (control.intEnable)
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pendingInt = true;
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if (pendingInt && !old_pending) {
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DPRINTF(Timer, "-- Causing interrupt\n");
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parent->gic->sendInt(intNum);
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}
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if (control.oneShot)
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return;
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// Free-running
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if (control.timerMode == 0)
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restartCounter(0xffffffff);
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else
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restartCounter(loadValue);
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}
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void
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Sp804::Timer::serialize(std::ostream &os)
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{
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DPRINTF(Checkpoint, "Serializing Arm Sp804\n");
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uint32_t control_serial = control;
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SERIALIZE_SCALAR(control_serial);
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SERIALIZE_SCALAR(rawInt);
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SERIALIZE_SCALAR(pendingInt);
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SERIALIZE_SCALAR(loadValue);
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bool is_in_event = zeroEvent.scheduled();
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SERIALIZE_SCALAR(is_in_event);
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Tick event_time;
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if (is_in_event){
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event_time = zeroEvent.when();
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SERIALIZE_SCALAR(event_time);
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}
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}
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void
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Sp804::Timer::unserialize(Checkpoint *cp, const std::string §ion)
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{
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DPRINTF(Checkpoint, "Unserializing Arm Sp804\n");
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uint32_t control_serial;
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UNSERIALIZE_SCALAR(control_serial);
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control = control_serial;
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UNSERIALIZE_SCALAR(rawInt);
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UNSERIALIZE_SCALAR(pendingInt);
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UNSERIALIZE_SCALAR(loadValue);
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bool is_in_event;
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UNSERIALIZE_SCALAR(is_in_event);
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Tick event_time;
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if (is_in_event){
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UNSERIALIZE_SCALAR(event_time);
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parent->schedule(zeroEvent, event_time);
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}
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}
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void
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Sp804::serialize(std::ostream &os)
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{
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nameOut(os, csprintf("%s.timer0", name()));
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timer0.serialize(os);
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nameOut(os, csprintf("%s.timer1", name()));
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timer1.serialize(os);
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}
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void
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Sp804::unserialize(Checkpoint *cp, const std::string §ion)
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{
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timer0.unserialize(cp, csprintf("%s.timer0", section));
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timer1.unserialize(cp, csprintf("%s.timer1", section));
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}
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Sp804 *
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Sp804Params::create()
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{
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return new Sp804(this);
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}
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