f7ddc4672a
The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.
commit 2c1286865f
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600
syscall-emul: Rewrite system call exit code
Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
686 lines
55 KiB
Plaintext
686 lines
55 KiB
Plaintext
|
|
---------- Begin Simulation Statistics ----------
|
|
sim_seconds 0.708700
|
|
sim_ticks 708700329500
|
|
final_tick 708700329500
|
|
sim_freq 1000000000000
|
|
host_inst_rate 679420
|
|
host_op_rate 735782
|
|
host_tick_rate 953505845
|
|
host_mem_usage 285772
|
|
host_seconds 743.26
|
|
sim_insts 504984064
|
|
sim_ops 546875315
|
|
system.voltage_domain.voltage 1
|
|
system.clk_domain.clock 1000
|
|
system.physmem.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.physmem.bytes_read::cpu.inst 147392
|
|
system.physmem.bytes_read::cpu.data 8988096
|
|
system.physmem.bytes_read::total 9135488
|
|
system.physmem.bytes_inst_read::cpu.inst 147392
|
|
system.physmem.bytes_inst_read::total 147392
|
|
system.physmem.bytes_written::writebacks 6185472
|
|
system.physmem.bytes_written::total 6185472
|
|
system.physmem.num_reads::cpu.inst 2303
|
|
system.physmem.num_reads::cpu.data 140439
|
|
system.physmem.num_reads::total 142742
|
|
system.physmem.num_writes::writebacks 96648
|
|
system.physmem.num_writes::total 96648
|
|
system.physmem.bw_read::cpu.inst 207975
|
|
system.physmem.bw_read::cpu.data 12682506
|
|
system.physmem.bw_read::total 12890481
|
|
system.physmem.bw_inst_read::cpu.inst 207975
|
|
system.physmem.bw_inst_read::total 207975
|
|
system.physmem.bw_write::writebacks 8727909
|
|
system.physmem.bw_write::total 8727909
|
|
system.physmem.bw_total::writebacks 8727909
|
|
system.physmem.bw_total::cpu.inst 207975
|
|
system.physmem.bw_total::cpu.data 12682506
|
|
system.physmem.bw_total::total 21618390
|
|
system.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu_clk_domain.clock 500
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.read_hits 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.read_misses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.write_hits 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.write_misses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.align_faults 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.hits 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.misses 0
|
|
system.cpu.dstage2_mmu.stage2_tlb.accesses 0
|
|
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.dtb.walker.walks 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0
|
|
system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0
|
|
system.cpu.dtb.walker.walkRequestOrigin::total 0
|
|
system.cpu.dtb.inst_hits 0
|
|
system.cpu.dtb.inst_misses 0
|
|
system.cpu.dtb.read_hits 0
|
|
system.cpu.dtb.read_misses 0
|
|
system.cpu.dtb.write_hits 0
|
|
system.cpu.dtb.write_misses 0
|
|
system.cpu.dtb.flush_tlb 0
|
|
system.cpu.dtb.flush_tlb_mva 0
|
|
system.cpu.dtb.flush_tlb_mva_asid 0
|
|
system.cpu.dtb.flush_tlb_asid 0
|
|
system.cpu.dtb.flush_entries 0
|
|
system.cpu.dtb.align_faults 0
|
|
system.cpu.dtb.prefetch_faults 0
|
|
system.cpu.dtb.domain_faults 0
|
|
system.cpu.dtb.perms_faults 0
|
|
system.cpu.dtb.read_accesses 0
|
|
system.cpu.dtb.write_accesses 0
|
|
system.cpu.dtb.inst_accesses 0
|
|
system.cpu.dtb.hits 0
|
|
system.cpu.dtb.misses 0
|
|
system.cpu.dtb.accesses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walks 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0
|
|
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0
|
|
system.cpu.istage2_mmu.stage2_tlb.inst_hits 0
|
|
system.cpu.istage2_mmu.stage2_tlb.inst_misses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.read_hits 0
|
|
system.cpu.istage2_mmu.stage2_tlb.read_misses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.write_hits 0
|
|
system.cpu.istage2_mmu.stage2_tlb.write_misses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0
|
|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0
|
|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0
|
|
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0
|
|
system.cpu.istage2_mmu.stage2_tlb.flush_entries 0
|
|
system.cpu.istage2_mmu.stage2_tlb.align_faults 0
|
|
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0
|
|
system.cpu.istage2_mmu.stage2_tlb.domain_faults 0
|
|
system.cpu.istage2_mmu.stage2_tlb.perms_faults 0
|
|
system.cpu.istage2_mmu.stage2_tlb.read_accesses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.write_accesses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.hits 0
|
|
system.cpu.istage2_mmu.stage2_tlb.misses 0
|
|
system.cpu.istage2_mmu.stage2_tlb.accesses 0
|
|
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.itb.walker.walks 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Requested::total 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0
|
|
system.cpu.itb.walker.walkRequestOrigin_Completed::total 0
|
|
system.cpu.itb.walker.walkRequestOrigin::total 0
|
|
system.cpu.itb.inst_hits 0
|
|
system.cpu.itb.inst_misses 0
|
|
system.cpu.itb.read_hits 0
|
|
system.cpu.itb.read_misses 0
|
|
system.cpu.itb.write_hits 0
|
|
system.cpu.itb.write_misses 0
|
|
system.cpu.itb.flush_tlb 0
|
|
system.cpu.itb.flush_tlb_mva 0
|
|
system.cpu.itb.flush_tlb_mva_asid 0
|
|
system.cpu.itb.flush_tlb_asid 0
|
|
system.cpu.itb.flush_entries 0
|
|
system.cpu.itb.align_faults 0
|
|
system.cpu.itb.prefetch_faults 0
|
|
system.cpu.itb.domain_faults 0
|
|
system.cpu.itb.perms_faults 0
|
|
system.cpu.itb.read_accesses 0
|
|
system.cpu.itb.write_accesses 0
|
|
system.cpu.itb.inst_accesses 0
|
|
system.cpu.itb.hits 0
|
|
system.cpu.itb.misses 0
|
|
system.cpu.itb.accesses 0
|
|
system.cpu.workload.numSyscalls 548
|
|
system.cpu.pwrStateResidencyTicks::ON 708700329500
|
|
system.cpu.numCycles 1417400659
|
|
system.cpu.numWorkItemsStarted 0
|
|
system.cpu.numWorkItemsCompleted 0
|
|
system.cpu.committedInsts 504984064
|
|
system.cpu.committedOps 546875315
|
|
system.cpu.num_int_alu_accesses 448447005
|
|
system.cpu.num_fp_alu_accesses 16
|
|
system.cpu.num_func_calls 19311615
|
|
system.cpu.num_conditional_control_insts 90670594
|
|
system.cpu.num_int_insts 448447005
|
|
system.cpu.num_fp_insts 16
|
|
system.cpu.num_int_register_reads 748339627
|
|
system.cpu.num_int_register_writes 289993515
|
|
system.cpu.num_fp_register_reads 16
|
|
system.cpu.num_fp_register_writes 0
|
|
system.cpu.num_cc_register_reads 1984285070
|
|
system.cpu.num_cc_register_writes 344062197
|
|
system.cpu.num_mem_refs 172743505
|
|
system.cpu.num_load_insts 115883283
|
|
system.cpu.num_store_insts 56860222
|
|
system.cpu.num_idle_cycles 0
|
|
system.cpu.num_busy_cycles 1417400659
|
|
system.cpu.not_idle_fraction 1
|
|
system.cpu.idle_fraction 0
|
|
system.cpu.Branches 121552863
|
|
system.cpu.op_class::No_OpClass 0 0.00% 0.00%
|
|
system.cpu.op_class::IntAlu 375609862 68.46% 68.46%
|
|
system.cpu.op_class::IntMult 339219 0.06% 68.52%
|
|
system.cpu.op_class::IntDiv 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatAdd 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatCmp 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatCvt 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatMult 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatMultAcc 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatDiv 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatMisc 0 0.00% 68.52%
|
|
system.cpu.op_class::FloatSqrt 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdAdd 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdAddAcc 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdAlu 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdCmp 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdCvt 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdMisc 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdMult 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdMultAcc 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdShift 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdShiftAcc 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdSqrt 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatAdd 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatAlu 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatCmp 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatCvt 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatDiv 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatMisc 3 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatMult 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 68.52%
|
|
system.cpu.op_class::SimdFloatSqrt 0 0.00% 68.52%
|
|
system.cpu.op_class::MemRead 115883283 21.12% 89.64%
|
|
system.cpu.op_class::MemWrite 56860206 10.36% 100.00%
|
|
system.cpu.op_class::FloatMemRead 0 0.00% 100.00%
|
|
system.cpu.op_class::FloatMemWrite 16 0.00% 100.00%
|
|
system.cpu.op_class::IprAccess 0 0.00% 100.00%
|
|
system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
|
|
system.cpu.op_class::total 548692589
|
|
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.dcache.tags.replacements 1136276
|
|
system.cpu.dcache.tags.tagsinuse 4065.253828
|
|
system.cpu.dcache.tags.total_refs 170177272
|
|
system.cpu.dcache.tags.sampled_refs 1140372
|
|
system.cpu.dcache.tags.avg_refs 149.229613
|
|
system.cpu.dcache.tags.warmup_cycle 11754931500
|
|
system.cpu.dcache.tags.occ_blocks::cpu.data 4065.253828
|
|
system.cpu.dcache.tags.occ_percent::cpu.data 0.992494
|
|
system.cpu.dcache.tags.occ_percent::total 0.992494
|
|
system.cpu.dcache.tags.occ_task_id_blocks::1024 4096
|
|
system.cpu.dcache.tags.age_task_id_blocks_1024::0 23
|
|
system.cpu.dcache.tags.age_task_id_blocks_1024::1 19
|
|
system.cpu.dcache.tags.age_task_id_blocks_1024::2 343
|
|
system.cpu.dcache.tags.age_task_id_blocks_1024::3 3546
|
|
system.cpu.dcache.tags.age_task_id_blocks_1024::4 165
|
|
system.cpu.dcache.tags.occ_task_id_percent::1024 1
|
|
system.cpu.dcache.tags.tag_accesses 343775660
|
|
system.cpu.dcache.tags.data_accesses 343775660
|
|
system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.dcache.ReadReq_hits::cpu.data 113315079
|
|
system.cpu.dcache.ReadReq_hits::total 113315079
|
|
system.cpu.dcache.WriteReq_hits::cpu.data 53882541
|
|
system.cpu.dcache.WriteReq_hits::total 53882541
|
|
system.cpu.dcache.SoftPFReq_hits::cpu.data 2570
|
|
system.cpu.dcache.SoftPFReq_hits::total 2570
|
|
system.cpu.dcache.LoadLockedReq_hits::cpu.data 1488541
|
|
system.cpu.dcache.LoadLockedReq_hits::total 1488541
|
|
system.cpu.dcache.StoreCondReq_hits::cpu.data 1488541
|
|
system.cpu.dcache.StoreCondReq_hits::total 1488541
|
|
system.cpu.dcache.demand_hits::cpu.data 167197620
|
|
system.cpu.dcache.demand_hits::total 167197620
|
|
system.cpu.dcache.overall_hits::cpu.data 167200190
|
|
system.cpu.dcache.overall_hits::total 167200190
|
|
system.cpu.dcache.ReadReq_misses::cpu.data 783863
|
|
system.cpu.dcache.ReadReq_misses::total 783863
|
|
system.cpu.dcache.WriteReq_misses::cpu.data 356508
|
|
system.cpu.dcache.WriteReq_misses::total 356508
|
|
system.cpu.dcache.SoftPFReq_misses::cpu.data 1
|
|
system.cpu.dcache.SoftPFReq_misses::total 1
|
|
system.cpu.dcache.demand_misses::cpu.data 1140371
|
|
system.cpu.dcache.demand_misses::total 1140371
|
|
system.cpu.dcache.overall_misses::cpu.data 1140372
|
|
system.cpu.dcache.overall_misses::total 1140372
|
|
system.cpu.dcache.ReadReq_miss_latency::cpu.data 12176129500
|
|
system.cpu.dcache.ReadReq_miss_latency::total 12176129500
|
|
system.cpu.dcache.WriteReq_miss_latency::cpu.data 9680337500
|
|
system.cpu.dcache.WriteReq_miss_latency::total 9680337500
|
|
system.cpu.dcache.demand_miss_latency::cpu.data 21856467000
|
|
system.cpu.dcache.demand_miss_latency::total 21856467000
|
|
system.cpu.dcache.overall_miss_latency::cpu.data 21856467000
|
|
system.cpu.dcache.overall_miss_latency::total 21856467000
|
|
system.cpu.dcache.ReadReq_accesses::cpu.data 114098942
|
|
system.cpu.dcache.ReadReq_accesses::total 114098942
|
|
system.cpu.dcache.WriteReq_accesses::cpu.data 54239049
|
|
system.cpu.dcache.WriteReq_accesses::total 54239049
|
|
system.cpu.dcache.SoftPFReq_accesses::cpu.data 2571
|
|
system.cpu.dcache.SoftPFReq_accesses::total 2571
|
|
system.cpu.dcache.LoadLockedReq_accesses::cpu.data 1488541
|
|
system.cpu.dcache.LoadLockedReq_accesses::total 1488541
|
|
system.cpu.dcache.StoreCondReq_accesses::cpu.data 1488541
|
|
system.cpu.dcache.StoreCondReq_accesses::total 1488541
|
|
system.cpu.dcache.demand_accesses::cpu.data 168337991
|
|
system.cpu.dcache.demand_accesses::total 168337991
|
|
system.cpu.dcache.overall_accesses::cpu.data 168340562
|
|
system.cpu.dcache.overall_accesses::total 168340562
|
|
system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.006870
|
|
system.cpu.dcache.ReadReq_miss_rate::total 0.006870
|
|
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.006573
|
|
system.cpu.dcache.WriteReq_miss_rate::total 0.006573
|
|
system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.000389
|
|
system.cpu.dcache.SoftPFReq_miss_rate::total 0.000389
|
|
system.cpu.dcache.demand_miss_rate::cpu.data 0.006774
|
|
system.cpu.dcache.demand_miss_rate::total 0.006774
|
|
system.cpu.dcache.overall_miss_rate::cpu.data 0.006774
|
|
system.cpu.dcache.overall_miss_rate::total 0.006774
|
|
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 15533.491822
|
|
system.cpu.dcache.ReadReq_avg_miss_latency::total 15533.491822
|
|
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 27153.212551
|
|
system.cpu.dcache.WriteReq_avg_miss_latency::total 27153.212551
|
|
system.cpu.dcache.demand_avg_miss_latency::cpu.data 19166.102084
|
|
system.cpu.dcache.demand_avg_miss_latency::total 19166.102084
|
|
system.cpu.dcache.overall_avg_miss_latency::cpu.data 19166.085277
|
|
system.cpu.dcache.overall_avg_miss_latency::total 19166.085277
|
|
system.cpu.dcache.blocked_cycles::no_mshrs 0
|
|
system.cpu.dcache.blocked_cycles::no_targets 0
|
|
system.cpu.dcache.blocked::no_mshrs 0
|
|
system.cpu.dcache.blocked::no_targets 0
|
|
system.cpu.dcache.avg_blocked_cycles::no_mshrs nan
|
|
system.cpu.dcache.avg_blocked_cycles::no_targets nan
|
|
system.cpu.dcache.writebacks::writebacks 1065429
|
|
system.cpu.dcache.writebacks::total 1065429
|
|
system.cpu.dcache.ReadReq_mshr_misses::cpu.data 783863
|
|
system.cpu.dcache.ReadReq_mshr_misses::total 783863
|
|
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 356508
|
|
system.cpu.dcache.WriteReq_mshr_misses::total 356508
|
|
system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 1
|
|
system.cpu.dcache.SoftPFReq_mshr_misses::total 1
|
|
system.cpu.dcache.demand_mshr_misses::cpu.data 1140371
|
|
system.cpu.dcache.demand_mshr_misses::total 1140371
|
|
system.cpu.dcache.overall_mshr_misses::cpu.data 1140372
|
|
system.cpu.dcache.overall_mshr_misses::total 1140372
|
|
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 11392266500
|
|
system.cpu.dcache.ReadReq_mshr_miss_latency::total 11392266500
|
|
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 9323829500
|
|
system.cpu.dcache.WriteReq_mshr_miss_latency::total 9323829500
|
|
system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 62000
|
|
system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 62000
|
|
system.cpu.dcache.demand_mshr_miss_latency::cpu.data 20716096000
|
|
system.cpu.dcache.demand_mshr_miss_latency::total 20716096000
|
|
system.cpu.dcache.overall_mshr_miss_latency::cpu.data 20716158000
|
|
system.cpu.dcache.overall_mshr_miss_latency::total 20716158000
|
|
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.006870
|
|
system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.006870
|
|
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.006573
|
|
system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.006573
|
|
system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.000389
|
|
system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.000389
|
|
system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.006774
|
|
system.cpu.dcache.demand_mshr_miss_rate::total 0.006774
|
|
system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.006774
|
|
system.cpu.dcache.overall_mshr_miss_rate::total 0.006774
|
|
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 14533.491822
|
|
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 14533.491822
|
|
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 26153.212551
|
|
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 26153.212551
|
|
system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 62000
|
|
system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 62000
|
|
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 18166.102084
|
|
system.cpu.dcache.demand_avg_mshr_miss_latency::total 18166.102084
|
|
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 18166.140523
|
|
system.cpu.dcache.overall_avg_mshr_miss_latency::total 18166.140523
|
|
system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.icache.tags.replacements 9788
|
|
system.cpu.icache.tags.tagsinuse 983.167360
|
|
system.cpu.icache.tags.total_refs 516597066
|
|
system.cpu.icache.tags.sampled_refs 11521
|
|
system.cpu.icache.tags.avg_refs 44839.602986
|
|
system.cpu.icache.tags.warmup_cycle 0
|
|
system.cpu.icache.tags.occ_blocks::cpu.inst 983.167360
|
|
system.cpu.icache.tags.occ_percent::cpu.inst 0.480062
|
|
system.cpu.icache.tags.occ_percent::total 0.480062
|
|
system.cpu.icache.tags.occ_task_id_blocks::1024 1733
|
|
system.cpu.icache.tags.age_task_id_blocks_1024::0 27
|
|
system.cpu.icache.tags.age_task_id_blocks_1024::1 24
|
|
system.cpu.icache.tags.age_task_id_blocks_1024::2 24
|
|
system.cpu.icache.tags.age_task_id_blocks_1024::3 256
|
|
system.cpu.icache.tags.age_task_id_blocks_1024::4 1402
|
|
system.cpu.icache.tags.occ_task_id_percent::1024 0.846191
|
|
system.cpu.icache.tags.tag_accesses 1033228695
|
|
system.cpu.icache.tags.data_accesses 1033228695
|
|
system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.icache.ReadReq_hits::cpu.inst 516597066
|
|
system.cpu.icache.ReadReq_hits::total 516597066
|
|
system.cpu.icache.demand_hits::cpu.inst 516597066
|
|
system.cpu.icache.demand_hits::total 516597066
|
|
system.cpu.icache.overall_hits::cpu.inst 516597066
|
|
system.cpu.icache.overall_hits::total 516597066
|
|
system.cpu.icache.ReadReq_misses::cpu.inst 11521
|
|
system.cpu.icache.ReadReq_misses::total 11521
|
|
system.cpu.icache.demand_misses::cpu.inst 11521
|
|
system.cpu.icache.demand_misses::total 11521
|
|
system.cpu.icache.overall_misses::cpu.inst 11521
|
|
system.cpu.icache.overall_misses::total 11521
|
|
system.cpu.icache.ReadReq_miss_latency::cpu.inst 265513000
|
|
system.cpu.icache.ReadReq_miss_latency::total 265513000
|
|
system.cpu.icache.demand_miss_latency::cpu.inst 265513000
|
|
system.cpu.icache.demand_miss_latency::total 265513000
|
|
system.cpu.icache.overall_miss_latency::cpu.inst 265513000
|
|
system.cpu.icache.overall_miss_latency::total 265513000
|
|
system.cpu.icache.ReadReq_accesses::cpu.inst 516608587
|
|
system.cpu.icache.ReadReq_accesses::total 516608587
|
|
system.cpu.icache.demand_accesses::cpu.inst 516608587
|
|
system.cpu.icache.demand_accesses::total 516608587
|
|
system.cpu.icache.overall_accesses::cpu.inst 516608587
|
|
system.cpu.icache.overall_accesses::total 516608587
|
|
system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.ReadReq_miss_rate::total 0.000022
|
|
system.cpu.icache.demand_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.demand_miss_rate::total 0.000022
|
|
system.cpu.icache.overall_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.overall_miss_rate::total 0.000022
|
|
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 23046.002951
|
|
system.cpu.icache.ReadReq_avg_miss_latency::total 23046.002951
|
|
system.cpu.icache.demand_avg_miss_latency::cpu.inst 23046.002951
|
|
system.cpu.icache.demand_avg_miss_latency::total 23046.002951
|
|
system.cpu.icache.overall_avg_miss_latency::cpu.inst 23046.002951
|
|
system.cpu.icache.overall_avg_miss_latency::total 23046.002951
|
|
system.cpu.icache.blocked_cycles::no_mshrs 0
|
|
system.cpu.icache.blocked_cycles::no_targets 0
|
|
system.cpu.icache.blocked::no_mshrs 0
|
|
system.cpu.icache.blocked::no_targets 0
|
|
system.cpu.icache.avg_blocked_cycles::no_mshrs nan
|
|
system.cpu.icache.avg_blocked_cycles::no_targets nan
|
|
system.cpu.icache.writebacks::writebacks 9788
|
|
system.cpu.icache.writebacks::total 9788
|
|
system.cpu.icache.ReadReq_mshr_misses::cpu.inst 11521
|
|
system.cpu.icache.ReadReq_mshr_misses::total 11521
|
|
system.cpu.icache.demand_mshr_misses::cpu.inst 11521
|
|
system.cpu.icache.demand_mshr_misses::total 11521
|
|
system.cpu.icache.overall_mshr_misses::cpu.inst 11521
|
|
system.cpu.icache.overall_mshr_misses::total 11521
|
|
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 253992000
|
|
system.cpu.icache.ReadReq_mshr_miss_latency::total 253992000
|
|
system.cpu.icache.demand_mshr_miss_latency::cpu.inst 253992000
|
|
system.cpu.icache.demand_mshr_miss_latency::total 253992000
|
|
system.cpu.icache.overall_mshr_miss_latency::cpu.inst 253992000
|
|
system.cpu.icache.overall_mshr_miss_latency::total 253992000
|
|
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.ReadReq_mshr_miss_rate::total 0.000022
|
|
system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.demand_mshr_miss_rate::total 0.000022
|
|
system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.000022
|
|
system.cpu.icache.overall_mshr_miss_rate::total 0.000022
|
|
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 22046.002951
|
|
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 22046.002951
|
|
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 22046.002951
|
|
system.cpu.icache.demand_avg_mshr_miss_latency::total 22046.002951
|
|
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 22046.002951
|
|
system.cpu.icache.overall_avg_mshr_miss_latency::total 22046.002951
|
|
system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.l2cache.tags.replacements 110813
|
|
system.cpu.l2cache.tags.tagsinuse 28700.010798
|
|
system.cpu.l2cache.tags.total_refs 2150809
|
|
system.cpu.l2cache.tags.sampled_refs 143581
|
|
system.cpu.l2cache.tags.avg_refs 14.979761
|
|
system.cpu.l2cache.tags.warmup_cycle 210357436000
|
|
system.cpu.l2cache.tags.occ_blocks::writebacks 80.467975
|
|
system.cpu.l2cache.tags.occ_blocks::cpu.inst 239.840136
|
|
system.cpu.l2cache.tags.occ_blocks::cpu.data 28379.702687
|
|
system.cpu.l2cache.tags.occ_percent::writebacks 0.002456
|
|
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.007319
|
|
system.cpu.l2cache.tags.occ_percent::cpu.data 0.866080
|
|
system.cpu.l2cache.tags.occ_percent::total 0.875855
|
|
system.cpu.l2cache.tags.occ_task_id_blocks::1024 32768
|
|
system.cpu.l2cache.tags.age_task_id_blocks_1024::0 60
|
|
system.cpu.l2cache.tags.age_task_id_blocks_1024::2 111
|
|
system.cpu.l2cache.tags.age_task_id_blocks_1024::3 661
|
|
system.cpu.l2cache.tags.age_task_id_blocks_1024::4 31936
|
|
system.cpu.l2cache.tags.occ_task_id_percent::1024 1
|
|
system.cpu.l2cache.tags.tag_accesses 18498717
|
|
system.cpu.l2cache.tags.data_accesses 18498717
|
|
system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.l2cache.WritebackDirty_hits::writebacks 1065429
|
|
system.cpu.l2cache.WritebackDirty_hits::total 1065429
|
|
system.cpu.l2cache.WritebackClean_hits::writebacks 9751
|
|
system.cpu.l2cache.WritebackClean_hits::total 9751
|
|
system.cpu.l2cache.ReadExReq_hits::cpu.data 255675
|
|
system.cpu.l2cache.ReadExReq_hits::total 255675
|
|
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 9218
|
|
system.cpu.l2cache.ReadCleanReq_hits::total 9218
|
|
system.cpu.l2cache.ReadSharedReq_hits::cpu.data 744258
|
|
system.cpu.l2cache.ReadSharedReq_hits::total 744258
|
|
system.cpu.l2cache.demand_hits::cpu.inst 9218
|
|
system.cpu.l2cache.demand_hits::cpu.data 999933
|
|
system.cpu.l2cache.demand_hits::total 1009151
|
|
system.cpu.l2cache.overall_hits::cpu.inst 9218
|
|
system.cpu.l2cache.overall_hits::cpu.data 999933
|
|
system.cpu.l2cache.overall_hits::total 1009151
|
|
system.cpu.l2cache.ReadExReq_misses::cpu.data 100833
|
|
system.cpu.l2cache.ReadExReq_misses::total 100833
|
|
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 2303
|
|
system.cpu.l2cache.ReadCleanReq_misses::total 2303
|
|
system.cpu.l2cache.ReadSharedReq_misses::cpu.data 39606
|
|
system.cpu.l2cache.ReadSharedReq_misses::total 39606
|
|
system.cpu.l2cache.demand_misses::cpu.inst 2303
|
|
system.cpu.l2cache.demand_misses::cpu.data 140439
|
|
system.cpu.l2cache.demand_misses::total 142742
|
|
system.cpu.l2cache.overall_misses::cpu.inst 2303
|
|
system.cpu.l2cache.overall_misses::cpu.data 140439
|
|
system.cpu.l2cache.overall_misses::total 142742
|
|
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 6104447000
|
|
system.cpu.l2cache.ReadExReq_miss_latency::total 6104447000
|
|
system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 139534000
|
|
system.cpu.l2cache.ReadCleanReq_miss_latency::total 139534000
|
|
system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 2398500500
|
|
system.cpu.l2cache.ReadSharedReq_miss_latency::total 2398500500
|
|
system.cpu.l2cache.demand_miss_latency::cpu.inst 139534000
|
|
system.cpu.l2cache.demand_miss_latency::cpu.data 8502947500
|
|
system.cpu.l2cache.demand_miss_latency::total 8642481500
|
|
system.cpu.l2cache.overall_miss_latency::cpu.inst 139534000
|
|
system.cpu.l2cache.overall_miss_latency::cpu.data 8502947500
|
|
system.cpu.l2cache.overall_miss_latency::total 8642481500
|
|
system.cpu.l2cache.WritebackDirty_accesses::writebacks 1065429
|
|
system.cpu.l2cache.WritebackDirty_accesses::total 1065429
|
|
system.cpu.l2cache.WritebackClean_accesses::writebacks 9751
|
|
system.cpu.l2cache.WritebackClean_accesses::total 9751
|
|
system.cpu.l2cache.ReadExReq_accesses::cpu.data 356508
|
|
system.cpu.l2cache.ReadExReq_accesses::total 356508
|
|
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 11521
|
|
system.cpu.l2cache.ReadCleanReq_accesses::total 11521
|
|
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 783864
|
|
system.cpu.l2cache.ReadSharedReq_accesses::total 783864
|
|
system.cpu.l2cache.demand_accesses::cpu.inst 11521
|
|
system.cpu.l2cache.demand_accesses::cpu.data 1140372
|
|
system.cpu.l2cache.demand_accesses::total 1151893
|
|
system.cpu.l2cache.overall_accesses::cpu.inst 11521
|
|
system.cpu.l2cache.overall_accesses::cpu.data 1140372
|
|
system.cpu.l2cache.overall_accesses::total 1151893
|
|
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.282835
|
|
system.cpu.l2cache.ReadExReq_miss_rate::total 0.282835
|
|
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.199896
|
|
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.050527
|
|
system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.050527
|
|
system.cpu.l2cache.demand_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.demand_miss_rate::cpu.data 0.123152
|
|
system.cpu.l2cache.demand_miss_rate::total 0.123919
|
|
system.cpu.l2cache.overall_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.overall_miss_rate::cpu.data 0.123152
|
|
system.cpu.l2cache.overall_miss_rate::total 0.123919
|
|
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60540.170381
|
|
system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60540.170381
|
|
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60587.928789
|
|
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60587.928789
|
|
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60559.018836
|
|
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60559.018836
|
|
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60587.928789
|
|
system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60545.485941
|
|
system.cpu.l2cache.demand_avg_miss_latency::total 60546.170714
|
|
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60587.928789
|
|
system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60545.485941
|
|
system.cpu.l2cache.overall_avg_miss_latency::total 60546.170714
|
|
system.cpu.l2cache.blocked_cycles::no_mshrs 0
|
|
system.cpu.l2cache.blocked_cycles::no_targets 0
|
|
system.cpu.l2cache.blocked::no_mshrs 0
|
|
system.cpu.l2cache.blocked::no_targets 0
|
|
system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan
|
|
system.cpu.l2cache.avg_blocked_cycles::no_targets nan
|
|
system.cpu.l2cache.writebacks::writebacks 96648
|
|
system.cpu.l2cache.writebacks::total 96648
|
|
system.cpu.l2cache.CleanEvict_mshr_misses::writebacks 2
|
|
system.cpu.l2cache.CleanEvict_mshr_misses::total 2
|
|
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 100833
|
|
system.cpu.l2cache.ReadExReq_mshr_misses::total 100833
|
|
system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 2303
|
|
system.cpu.l2cache.ReadCleanReq_mshr_misses::total 2303
|
|
system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 39606
|
|
system.cpu.l2cache.ReadSharedReq_mshr_misses::total 39606
|
|
system.cpu.l2cache.demand_mshr_misses::cpu.inst 2303
|
|
system.cpu.l2cache.demand_mshr_misses::cpu.data 140439
|
|
system.cpu.l2cache.demand_mshr_misses::total 142742
|
|
system.cpu.l2cache.overall_mshr_misses::cpu.inst 2303
|
|
system.cpu.l2cache.overall_mshr_misses::cpu.data 140439
|
|
system.cpu.l2cache.overall_mshr_misses::total 142742
|
|
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 5096117000
|
|
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 5096117000
|
|
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 116504000
|
|
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 116504000
|
|
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 2002440500
|
|
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 2002440500
|
|
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 116504000
|
|
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 7098557500
|
|
system.cpu.l2cache.demand_mshr_miss_latency::total 7215061500
|
|
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 116504000
|
|
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 7098557500
|
|
system.cpu.l2cache.overall_mshr_miss_latency::total 7215061500
|
|
system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks inf
|
|
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total inf
|
|
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.282835
|
|
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.282835
|
|
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.199896
|
|
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.050527
|
|
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.050527
|
|
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.123152
|
|
system.cpu.l2cache.demand_mshr_miss_rate::total 0.123919
|
|
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.199896
|
|
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.123152
|
|
system.cpu.l2cache.overall_mshr_miss_rate::total 0.123919
|
|
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50540.170381
|
|
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50540.170381
|
|
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50587.928789
|
|
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50587.928789
|
|
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50559.018836
|
|
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50559.018836
|
|
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50587.928789
|
|
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50545.485941
|
|
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50546.170714
|
|
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50587.928789
|
|
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50545.485941
|
|
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50546.170714
|
|
system.cpu.toL2Bus.snoop_filter.tot_requests 2297957
|
|
system.cpu.toL2Bus.snoop_filter.hit_single_requests 1146116
|
|
system.cpu.toL2Bus.snoop_filter.hit_multi_requests 3565
|
|
system.cpu.toL2Bus.snoop_filter.tot_snoops 2153
|
|
system.cpu.toL2Bus.snoop_filter.hit_single_snoops 2152
|
|
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 1
|
|
system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.cpu.toL2Bus.trans_dist::ReadResp 795385
|
|
system.cpu.toL2Bus.trans_dist::WritebackDirty 1162077
|
|
system.cpu.toL2Bus.trans_dist::WritebackClean 9788
|
|
system.cpu.toL2Bus.trans_dist::CleanEvict 85012
|
|
system.cpu.toL2Bus.trans_dist::ReadExReq 356508
|
|
system.cpu.toL2Bus.trans_dist::ReadExResp 356508
|
|
system.cpu.toL2Bus.trans_dist::ReadCleanReq 11521
|
|
system.cpu.toL2Bus.trans_dist::ReadSharedReq 783864
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 32830
|
|
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3417020
|
|
system.cpu.toL2Bus.pkt_count::total 3449850
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1363776
|
|
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 141171264
|
|
system.cpu.toL2Bus.pkt_size::total 142535040
|
|
system.cpu.toL2Bus.snoops 110813
|
|
system.cpu.toL2Bus.snoopTraffic 6185472
|
|
system.cpu.toL2Bus.snoop_fanout::samples 1262706
|
|
system.cpu.toL2Bus.snoop_fanout::mean 0.004570
|
|
system.cpu.toL2Bus.snoop_fanout::stdev 0.067461
|
|
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00%
|
|
system.cpu.toL2Bus.snoop_fanout::0 1256936 99.54% 99.54%
|
|
system.cpu.toL2Bus.snoop_fanout::1 5769 0.46% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::2 1 0.00% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00%
|
|
system.cpu.toL2Bus.snoop_fanout::min_value 0
|
|
system.cpu.toL2Bus.snoop_fanout::max_value 2
|
|
system.cpu.toL2Bus.snoop_fanout::total 1262706
|
|
system.cpu.toL2Bus.reqLayer0.occupancy 2224195500
|
|
system.cpu.toL2Bus.reqLayer0.utilization 0.3
|
|
system.cpu.toL2Bus.respLayer0.occupancy 17281500
|
|
system.cpu.toL2Bus.respLayer0.utilization 0.0
|
|
system.cpu.toL2Bus.respLayer1.occupancy 1710558000
|
|
system.cpu.toL2Bus.respLayer1.utilization 0.2
|
|
system.membus.snoop_filter.tot_requests 251405
|
|
system.membus.snoop_filter.hit_single_requests 108784
|
|
system.membus.snoop_filter.hit_multi_requests 0
|
|
system.membus.snoop_filter.tot_snoops 0
|
|
system.membus.snoop_filter.hit_single_snoops 0
|
|
system.membus.snoop_filter.hit_multi_snoops 0
|
|
system.membus.pwrStateResidencyTicks::UNDEFINED 708700329500
|
|
system.membus.trans_dist::ReadResp 41909
|
|
system.membus.trans_dist::WritebackDirty 96648
|
|
system.membus.trans_dist::CleanEvict 12014
|
|
system.membus.trans_dist::ReadExReq 100833
|
|
system.membus.trans_dist::ReadExResp 100833
|
|
system.membus.trans_dist::ReadSharedReq 41909
|
|
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 394146
|
|
system.membus.pkt_count::total 394146
|
|
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15320960
|
|
system.membus.pkt_size::total 15320960
|
|
system.membus.snoops 0
|
|
system.membus.snoopTraffic 0
|
|
system.membus.snoop_fanout::samples 142743
|
|
system.membus.snoop_fanout::mean 0
|
|
system.membus.snoop_fanout::stdev 0
|
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00%
|
|
system.membus.snoop_fanout::0 142743 100.00% 100.00%
|
|
system.membus.snoop_fanout::1 0 0.00% 100.00%
|
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00%
|
|
system.membus.snoop_fanout::min_value 0
|
|
system.membus.snoop_fanout::max_value 0
|
|
system.membus.snoop_fanout::total 142743
|
|
system.membus.reqLayer0.occupancy 644372828
|
|
system.membus.reqLayer0.utilization 0.1
|
|
system.membus.respLayer1.occupancy 713710000
|
|
system.membus.respLayer1.utilization 0.1
|
|
|
|
---------- End Simulation Statistics ----------
|