Gabe Black 697e559956 arch: Make and use endian specific versions of the mem helpers. ...

Rather than using TheISA to pick an endian conversion function, we can
have a version defined for big and little endian and call the right one
from the ISA code.

Change-Id: I5014504968952e21abff3c5f6cbe58ca24233f33
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22373
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-11-18 20:02:31 +00:00

..

freebsd

arch, base, dev, kern, sym: FreeBSD support

2015-04-29 22:35:23 -05:00

linux

arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code.

2019-05-30 06:07:33 +00:00

BaseInterrupts.py

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

BaseTLB.py

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

debugfaults.hh

arch, x86: Rework the debug faults and microops.

2019-09-18 06:26:35 +00:00

decode_cache.cc

arch: cpu: Make the ExtMachInst type a template argument in InstMap.

2018-03-27 10:57:54 +00:00

decode_cache.hh

arch: cpu: Make the ExtMachInst type a template argument in InstMap.

2018-03-27 10:57:54 +00:00

interrupts.hh

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

ISACommon.py

cpu: Added interface for vector reg file

2017-07-05 14:43:49 +00:00

locked_mem.hh

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

memhelpers.hh

arch: Make and use endian specific versions of the mem helpers.

2019-11-18 20:02:31 +00:00

mmapped_ipr.cc

arch: Include some additional headers in arch/generic/mmapped_ipr.cc.

2018-10-17 20:19:03 +00:00

mmapped_ipr.hh

mem: Use a flag instead of address bit 63 for generic IPRs

2013-10-15 13:24:35 +02:00

pseudo_inst.cc

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

pseudo_inst.hh

kvm, x86: Adding support for SE mode execution

2014-11-23 18:01:08 -08:00

SConscript

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

tlb.hh

arch: Get rid of the unused GenericTLB.

2019-10-18 21:53:43 +00:00

traits.hh

cpu, arch, arch-arm: Wire unused VecElem code in the O3 model

2019-01-25 12:55:27 +00:00

types.hh

arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0

2019-08-21 12:17:17 +00:00

vec_pred_reg.hh

arch,cpu: Add vector predicate registers

2019-01-30 16:57:54 +00:00

vec_reg.hh

arch: Bump MaxVecRegLenInBytes to 4096

2019-08-09 23:28:54 +00:00