Daniel R. Carvalho e42d2a4789 arch,sim: Rename PseudoInst namespace as pseudo_inst ...

As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::PseudoInst became ::pseudo_inst.

Change-Id: Ie5a8f82a532e5158992ca260b4a24e7c6f311be9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45429
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>

2021-05-26 23:08:21 +00:00

..

arch

arch,sim: Rename PseudoInst namespace as pseudo_inst

2021-05-26 23:08:21 +00:00

base

misc: Rename BitfieldBackend namespace as bitfield_backend

2021-05-26 23:08:21 +00:00

cpu

arch,cpu: Rename DecodeCache namespace as decode_cache

2021-05-26 23:08:21 +00:00

dev

misc: Rename SimClock namespace as sim_clock

2021-05-26 22:30:33 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

misc: Rename SimClock namespace as sim_clock

2021-05-26 22:30:33 +00:00

kern

arch: Rename FreeBSD namespace as free_bsd

2021-05-26 23:08:21 +00:00

learning_gem5

base-stats: Rename Units namespace as units

2021-05-26 22:30:33 +00:00

mem

misc: Rename SimClock namespace as sim_clock

2021-05-26 22:30:33 +00:00

proto

python,scons: Move readCommand and compareVersions into site_scons.

2021-05-10 23:33:22 +00:00

python

fastmodel: Fix scx_get_parameter_list for ARM fastmodels.

2021-05-18 14:06:52 +00:00

sim

arch,sim: Rename PseudoInst namespace as pseudo_inst

2021-05-26 23:08:21 +00:00

systemc

misc: Rename SimClock namespace as sim_clock

2021-05-26 22:30:33 +00:00

Doxyfile

misc: Update version to "DEVELOP-FOR-V21.1"

2021-03-26 18:21:34 +00:00

SConscript

base: Construct debug flags on the heap

2021-05-25 00:26:28 +00:00