Min Kyu Jeong e1168e72ca ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) ...

When decoding a srs instruction, invalid mode encoding returns invalid instruction.
This can happen when garbage instructions are fetched from mispredicted path

2010-08-25 19:10:43 -05:00

..

freebsd

tick: rename Clock namespace to SimClock

2010-04-15 16:24:12 -07:00

isa

cpu: fix exec tracing memory corruption bug

2010-03-23 08:50:57 -07:00

linux

tick: rename Clock namespace to SimClock

2010-04-15 16:24:12 -07:00

tru64

tick: rename Clock namespace to SimClock

2010-04-15 16:24:12 -07:00

AlphaInterrupts.py

Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.

2008-10-12 09:09:56 -07:00

AlphaSystem.py

Loader: Make the load address mask be a parameter of the system rather than a constant.

2010-08-23 11:18:39 -05:00

AlphaTLB.py

tlb: More fixing of unified TLB

2009-04-08 22:21:27 -07:00

aout_machdep.h

style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs

2008-09-10 14:26:15 -04:00

ecoff_machdep.h

New directory structure:

2006-05-22 14:29:33 -04:00

ev5.cc

ISA: Get rid of old, unused utility functions cluttering up the ISAs.

2010-08-23 16:14:20 -07:00

ev5.hh

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

faults.cc

Mem: Eliminate the NO_FAULT request flag.

2009-11-10 21:10:18 -08:00

faults.hh

mem: update stuff for changes to Packet and Request

2008-11-10 11:51:17 -08:00

idle_event.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

idle_event.hh

Put kernel_stats back into arch.

2006-11-07 22:34:34 -05:00

interrupts.cc

Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.

2008-10-12 09:09:56 -07:00

interrupts.hh

types: clean up types, especially signed vs unsigned

2009-06-04 23:21:12 -07:00

ipr.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

ipr.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

isa_traits.hh

Loader: Make the load address mask be a parameter of the system rather than a constant.

2010-08-23 11:18:39 -05:00

isa.cc

ISA: Fix compilation.

2009-10-17 01:13:41 -07:00

isa.hh

ISA: Fix compilation.

2009-10-17 01:13:41 -07:00

kernel_stats.cc

alpha: Clean up namespace usage.

2008-09-27 21:03:47 -07:00

kernel_stats.hh

stats: Fix all stats usages to deal with template fixes

2009-03-05 19:09:53 -08:00

kgdb.h

Force remote gdb code to use signal numbers and not ISA specific trap numbers.

2006-11-07 23:40:54 -05:00

locked_mem.hh

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

microcode_rom.hh

CPU: Create a microcode ROM object in the CPU which is defined by the ISA.

2008-10-12 15:59:21 -07:00

mmaped_ipr.hh

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

mt.hh

alpha-isa: add mt.hh so it can compile with inorder

2009-05-12 20:18:34 -04:00

osfpal.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

osfpal.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

pagetable.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

pagetable.hh

sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.

2009-02-16 17:47:39 -05:00

predecoder.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

process.cc

sim: revamp unserialization procedure

2010-08-17 05:17:06 -07:00

process.hh

sim: revamp unserialization procedure

2010-08-17 05:17:06 -07:00

registers.hh

ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)

2010-08-25 19:10:43 -05:00

regredir.cc

Alpha: Missed a file in an earlier changeset.

2009-07-09 00:20:41 -07:00

regredir.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

remote_gdb.cc

Alpha: Move reg_redir into its own files, and move some constants into regfile.hh.

2009-07-08 23:02:21 -07:00

remote_gdb.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

SConscript

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

SConsopts

alpha: get rid of all turbolaser remnants

2009-04-08 22:22:49 -07:00

stacktrace.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

stacktrace.hh

types: clean up types, especially signed vs unsigned

2009-06-04 23:21:12 -07:00

system.cc

Loader: Make the load address mask be a parameter of the system rather than a constant.

2010-08-23 11:18:39 -05:00

system.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

tlb.cc

inorder-mem: skeleton support for prefetch/writehints

2009-05-12 15:01:15 -04:00

tlb.hh

tlb: More fixing of unified TLB

2009-04-08 22:21:27 -07:00

types.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

utility.cc

Alpha: Pull the MiscRegFile fully into the ISA object.

2009-07-08 23:02:22 -07:00

utility.hh

ISA: Get rid of old, unused utility functions cluttering up the ISAs.

2010-08-23 16:14:20 -07:00

vtophys.cc

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00

vtophys.hh

style: Make a style pass over the whole arch/alpha directory.

2008-09-27 21:03:48 -07:00