Korey Sewell db2b721380 inorder-tlb-cunit: merge the TLB as implicit to any memory access ...

TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst
since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory
and the result is checked before it's sent out to memory.
* * *

2009-05-12 15:01:16 -04:00

..

checker

Mem: Change isLlsc to isLLSC.

2009-04-19 21:44:15 -07:00

inorder

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

memtest

stats: Fix all stats usages to deal with template fixes

2009-03-05 19:09:53 -08:00

o3

inorder-o3: allow both to compile together

2009-05-12 15:01:14 -04:00

ozone

request: rename INST_READ to INST_FETCH.

2009-04-20 18:54:02 -07:00

simple

request: rename INST_READ to INST_FETCH.

2009-04-20 18:54:02 -07:00

trace

request: rename INST_READ to INST_FETCH.

2009-04-20 18:54:02 -07:00

2bit_local_pred.cc

inorder-o3: allow both to compile together

2009-05-12 15:01:14 -04:00

activity.cc

o3cpu: give a name to the activity recorder for better tracing

2009-01-21 14:56:18 -08:00

activity.hh

o3cpu: give a name to the activity recorder for better tracing

2009-01-21 14:56:18 -08:00

base_dyn_inst_impl.hh

O3CPU: Make the instcount debugging stuff per-cpu.

2008-11-10 11:51:18 -08:00

base_dyn_inst.hh

tlb: More fixing of unified TLB

2009-04-08 22:21:27 -07:00

base.cc

cpus: fix cpu progress event

2009-05-05 02:39:05 -04:00

base.hh

cpus: fix cpu progress event

2009-05-05 02:39:05 -04:00

BaseCPU.py

arm: Unify the ARM tlb. We forgot about this when we did the rest.

2009-04-21 15:40:25 -07:00

btb.cc

inorder-o3: allow both to compile together

2009-05-12 15:01:14 -04:00

CheckerCPU.py

Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its

2008-08-18 10:50:58 -07:00

cpu_models.py

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

cpuevent.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

cpuevent.hh

eventq: convert all usage of events to use the new API.

2008-10-09 04:58:24 -07:00

exec_context.hh

O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes

2008-10-20 16:22:59 -04:00

exetrace.cc

CPU: Only look up the nearest symbol in the kernel if you're actually in kernel code.

2009-02-25 10:22:36 -08:00

exetrace.hh

ExeTrace: Allow subclasses of the tracer to define their own prefix to dump

2009-02-10 15:49:29 -08:00

ExeTracer.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

func_unit.cc

params: Deprecate old-style constructors; update most SimObject constructors.

2007-08-30 15:16:59 -04:00

func_unit.hh

params: Deprecate old-style constructors; update most SimObject constructors.

2007-08-30 15:16:59 -04:00

FuncUnit.py

Rename enum from OpType to OpClass so it's consistent with the

2007-06-11 23:10:58 -07:00

inst_seq.hh

fixes so that M5 will compile under solaris

2006-11-04 21:41:01 -05:00

inteltrace.cc

params: Deprecate old-style constructors; update most SimObject constructors.

2007-08-30 15:16:59 -04:00

inteltrace.hh

Tracing: Make tracing aware of macro and micro ops.

2009-01-06 22:34:18 -08:00

IntelTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

intr_control.cc

style: Use the correct m5 style for things relating to interrupts.

2008-10-21 07:12:53 -07:00

intr_control.hh

Interrupts: Inline some code and remove duplication.

2007-11-08 10:46:41 -05:00

IntrControl.py

Move SimObject python files alongside the C++ and fix

2007-05-27 19:21:17 -07:00

legiontrace.cc

String constant const-ness changes to placate g++ 4.2.

2007-10-31 18:04:22 -07:00

legiontrace.hh

Tracing: Make tracing aware of macro and micro ops.

2009-01-06 22:34:18 -08:00

LegionTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

m5legion_interface.h

add fsr to the list of registers we are interested in

2007-01-30 18:27:04 -05:00

nativetrace.cc

sockets: Add a function to disable all listening sockets.

2008-08-03 18:19:55 -07:00

nativetrace.hh

Tracing: Make tracing aware of macro and micro ops.

2009-01-06 22:34:18 -08:00

NativeTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

op_class.hh

Major changes to how SimObjects are created and initialized. Almost all

2007-07-23 21:51:38 -07:00

pc_event.cc

debug: Move debug_break into src/base

2009-02-23 11:48:40 -08:00

pc_event.hh

Added sim/host.hh for the Addr type.

2006-11-07 05:42:15 -05:00

profile.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

profile.hh

Put the ProcessInfo and StackTrace objects into the ISA namespaces.

2006-11-08 00:52:04 -05:00

quiesce_event.cc

eventq: convert all usage of events to use the new API.

2008-10-09 04:58:24 -07:00

quiesce_event.hh

Make the Event::description() a const function

2008-02-06 16:32:40 -05:00

ras.cc

inorder-o3: allow both to compile together

2009-05-12 15:01:14 -04:00

SConscript

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

simple_thread.cc

Get rid of the Unallocated thread context state.

2009-04-15 13:13:47 -07:00

simple_thread.hh

Get rid of the Unallocated thread context state.

2009-04-15 13:13:47 -07:00

smt.hh

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

static_inst.cc

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

static_inst.hh

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

thread_context.cc

Add in Context IDs to the simulator. From now on, cpuId is almost never used,

2008-11-02 21:57:07 -05:00

thread_context.hh

Get rid of the Unallocated thread context state.

2009-04-15 13:13:47 -07:00

thread_state.cc

ThreadState: initialize status to Halted in constructor.

2009-04-15 13:18:24 -07:00

thread_state.hh

ThreadState: initialize status to Halted in constructor.

2009-04-15 13:18:24 -07:00

tournament_pred.cc

inorder-o3: allow both to compile together

2009-05-12 15:01:14 -04:00