da4f5726be6c58f697d7f1d20759b511c641e6b0
This generalized Workload SimObject is not geared towards FS or SE simulations, although currently it's only used in FS. This gets rid of the ARM specific highestELIs64 property (from the workload, not the system) and replaces it with a generic getArch. The old globally accessible kernel symtab has been replaced with a symtab accessor which takes a ThreadContext *. The parameter isn't used for anything for now, but in cases where there might be multiple symbol tables to choose from (kernel vs. current user space?) the method will now be able to distinguish which to use. This also makes it possible for the workload to manage its symbol table with whatever policy makes sense for it. That method returns a const SymbolTable * since most of the time the symbol table doesn't need to be modified. In the one case where an external entity needs to modify the table, two pseudo instructions, the table to modify isn't necessarily the one that's currently active. For instance, the pseudo instruction will likely execute in user space, but might be intended to add a symbol to the kernel in case something like a module was loaded. To support that usage, the workload has a generic "insertSymbol" method which will insert the symbol in the table that "makes sense". There is a lot of ambiguity what that means, but it's no less ambiguous than today where we're only saved by the fact that there is generally only one active symbol table to worry about. This change also introduces a KernelWorkload SimObject class which inherits from Workload and adds in kernel related members for cases where the kernel is specified in the config and loaded by gem5 itself. That's the common case, but the base Workload class would be used directly when, for instance, doing a baremetal simulation or if the kernel is loaded by software within the simulation as is the case for SPARC FS. Because a given architecture specific workload class needs to inherit from either Workload or KernelWorkload, this change removes the ability to boot ARM without a kernel. This ability should be restored in the future. To make having or not having a kernel more flexible, the kernel specific members of the KernelWorkload should be factored out into their own object which can then be attached to a workload through a (potentially unused) property rather than inheritance. Change-Id: Idf72615260266d7b4478d20d4035ed5a1e7aa241 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24283 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
This is the gem5 simulator. The main website can be found at http://www.gem5.org A good starting point is http://www.gem5.org/about, and for more information about building the simulator and getting started please see http://www.gem5.org/documentation and http://www.gem5.org/documentation/learning_gem5/introduction. To build gem5, you will need the following software: g++ or clang, Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4, and lastly protobuf if you want trace capture and playback support. Please see http://www.gem5.org/documentation/general_docs/building for more details concerning the minimum versions of the aforementioned tools. Once you have all dependencies resolved, type 'scons build/<ARCH>/gem5.opt' where ARCH is one of ARM, NULL, MIPS, POWER, SPARC, or X86. This will build an optimized version of the gem5 binary (gem5.opt) for the the specified architecture. See http://www.gem5.org/documentation/general_docs/building for more details and options. The basic source release includes these subdirectories: - configs: example simulation configuration scripts - ext: less-common external packages needed to build gem5 - src: source code of the gem5 simulator - system: source for some optional system software for simulated systems - tests: regression tests - util: useful utility programs and files To run full-system simulations, you will need compiled system firmware (console and PALcode for Alpha), kernel binaries and one or more disk images. If you have questions, please send mail to gem5-users@gem5.org Enjoy using gem5 and please share your modifications and extensions.
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