Daniel R. Carvalho d8bc7899a9 mem-cache: Remove Cache dependency from Tags ...

Tags do not need to be aware of caches.

Change-Id: Ib6a082b74dcd9b2f10852651634b59512732fb2a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/14296
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

2018-11-14 21:02:08 +00:00

..

arch

arch-arm: Print register name when warning on AT instructions

2018-11-14 14:22:19 +00:00

base

base: Add standard types for floating and nonfloating point register values.

2018-11-05 23:42:08 +00:00

cpu

cpu: Fixed PC shifting on LTAGE branch predictor

2018-11-13 22:37:56 +00:00

dev

dev: Remove using namespace TheISA in uart8250.cc.

2018-10-17 20:18:29 +00:00

doc

docs: Fix power model doxygen

2018-04-20 15:59:35 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

gpu-compute: Explicitly use little endian packet accessors.

2018-10-17 23:38:47 +00:00

kern

sim-se: Add /sys/devices/system/cpu/online file

2018-03-15 20:45:34 +00:00

learning_gem5

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

mem

mem-cache: Remove Cache dependency from Tags

2018-11-14 21:02:08 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

sim: Push the global frequency management code into C++.

2018-11-12 22:05:00 +00:00

sim

sim: Move BitUnion overloading to show/parseParams

2018-11-14 10:13:01 +00:00

systemc

systemc: Push python headers on top of sources

2018-11-12 23:30:22 +00:00

unittest

tests: Convert AddrRangeMap unit test to a GTest

2018-10-26 09:14:34 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Generalize building binaries.

2018-06-26 00:15:12 +00:00