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arch-arm: Print register name when warning on AT instructions

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With this patch we don't print anymore the enum value when warning
on any AT instruction usage, but we print the sys reg name instead

Change-Id: Ic6831b98ad6b0582be69883dc9519a9d3324da30
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/14316
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Travaglini
2018-11-12 16:46:52 +00:00
parent 8590243fef
commit ea0f654923
1 changed files with 5 additions and 2 deletions
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7
src/arch/arm/isa.cc
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@@ -1641,7 +1641,8 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
// done in the same mode the core is running in. NOTE: This
// can't be an atomic translation because that causes problems
// with unexpected atomic snoop requests.
warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg);
warn("Translating via %s in functional mode! Fix Me!\n",
miscRegName[misc_reg]);
auto req = std::make_shared<Request>(
0, val, 0, flags, Request::funcMasterId,
@@ -1898,7 +1899,9 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
// done in the same mode the core is running in. NOTE: This
// can't be an atomic translation because that causes problems
// with unexpected atomic snoop requests.
warn("Translating via MISCREG(%d) in functional mode! Fix Me!\n", misc_reg);
warn("Translating via %s in functional mode! Fix Me!\n",
miscRegName[misc_reg]);
req->setVirt(0, val, 0, flags, Request::funcMasterId,
tc->pcState().pc());
req->setContext(tc->contextId());