ba1473f2a9
Rather than defining multiple flags (one per ISA), we should define a single PageTableWalker flag shared by all ISAs Change-Id: Iad460bcd9a69d5c6f90443e43feec318429165aa Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44965 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
86 lines
3.3 KiB
Python
86 lines
3.3 KiB
Python
# -*- mode:python -*-
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# Copyright (c) 2013 ARM Limited
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# Copyright (c) 2014 Sven Karlsson
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# Copyright (c) 2020 Barkhausen Institut
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# Copyright (c) 2021 Huawei International
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# All rights reserved
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2016 The University of Virginia
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Import('*')
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if env['TARGET_ISA'] == 'riscv':
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Source('decoder.cc')
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Source('faults.cc')
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Source('isa.cc')
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Source('locked_mem.cc')
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Source('process.cc')
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Source('pagetable.cc')
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Source('pagetable_walker.cc')
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Source('pma_checker.cc')
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Source('pmp.cc')
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Source('reg_abi.cc')
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Source('remote_gdb.cc')
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Source('tlb.cc')
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Source('linux/se_workload.cc')
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Source('linux/linux.cc')
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Source('linux/fs_workload.cc')
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Source('bare_metal/fs_workload.cc')
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SimObject('PMAChecker.py')
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SimObject('PMP.py')
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SimObject('RiscvFsWorkload.py')
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SimObject('RiscvInterrupts.py')
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SimObject('RiscvISA.py')
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SimObject('RiscvMMU.py')
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SimObject('RiscvSeWorkload.py')
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SimObject('RiscvTLB.py')
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DebugFlag('RiscvMisc')
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DebugFlag('TLBVerbose')
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DebugFlag('PMP')
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# Add in files generated by the ISA description.
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ISADesc('isa/main.isa')
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GdbXml('riscv.xml', 'gdb_xml_riscv_target')
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GdbXml('riscv-64bit-cpu.xml', 'gdb_xml_riscv_cpu')
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GdbXml('riscv-64bit-fpu.xml', 'gdb_xml_riscv_fpu')
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GdbXml('riscv-64bit-csr.xml', 'gdb_xml_riscv_csr')
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