d33a693e43
The only thing still in arch/registers.hh were related to vector registers. To make it obvious that nothing else should be added, this change renames the file so that it has the much less generic name arch/vecregs.hh. Change-Id: I729697dc576e1978047688d9700dc07ff9b17044 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42686 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
83 lines
2.8 KiB
C++
83 lines
2.8 KiB
C++
/*
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* Copyright 2020 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_LINUX_SE_WORKLOAD_HH__
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#define __ARCH_ARM_LINUX_SE_WORKLOAD_HH__
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#include "arch/arm/linux/linux.hh"
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#include "arch/arm/regs/int.hh"
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#include "arch/arm/se_workload.hh"
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#include "params/ArmEmuLinux.hh"
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#include "sim/syscall_desc.hh"
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namespace ArmISA
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{
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class EmuLinux : public SEWorkload
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{
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public:
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using Params = ArmEmuLinuxParams;
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EmuLinux(const Params &p) : SEWorkload(p) {}
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struct BaseSyscallABI {};
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struct SyscallABI32 : public SEWorkload::SyscallABI32,
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public BaseSyscallABI
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{};
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struct SyscallABI64 : public SEWorkload::SyscallABI64,
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public BaseSyscallABI
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{};
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void syscall(ThreadContext *tc) override;
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};
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} // namespace ArmISA
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namespace GuestABI
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{
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template <typename ABI>
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struct Result<ABI, SyscallReturn,
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typename std::enable_if_t<std::is_base_of<
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ArmISA::EmuLinux::BaseSyscallABI, ABI>::value>>
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{
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static void
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store(ThreadContext *tc, const SyscallReturn &ret)
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{
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if (ret.suppressed() || ret.needsRetry())
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return;
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tc->setIntReg(ArmISA::ReturnValueReg, ret.encodedValue());
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if (ret.count() > 1)
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tc->setIntReg(ArmISA::SyscallPseudoReturnReg, ret.value2());
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}
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};
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} // namespace GuestABI
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#endif // __ARCH_ARM_LINUX_SE_WORKLOAD_HH__
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