baba18ab92
First: Rename FullCPU and its variants in the o3 directory to O3CPU to differentiate from the old model, and also to specify it's an out of order model.
Second: Include build options for selecting the Checker to be used. These options make sure if the Checker is being used there is a CPU that supports it also being compiled.
SConstruct:
Add in option USE_CHECKER to allow for not compiling in checker code. The checker is enabled through this option instead of through the CPU_MODELS list. However it's still necessary to treat the Checker like a CPU model, so it is appended onto the CPU_MODELS list if enabled.
configs/test/test.py:
Name change for DetailedCPU to DetailedO3CPU. Also include option for max tick.
src/base/traceflags.py:
Add in O3CPU trace flag.
src/cpu/SConscript:
Rename AlphaFullCPU to AlphaO3CPU.
Only include checker sources if they're necessary. Also add a list of CPUs that support the Checker, and only allow the Checker to be compiled in if one of those CPUs are also being included.
src/cpu/base_dyn_inst.cc:
src/cpu/base_dyn_inst.hh:
Rename typedef to ImplCPU instead of FullCPU, to differentiate from the old FullCPU.
src/cpu/cpu_models.py:
src/cpu/o3/alpha_cpu.cc:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_builder.cc:
src/cpu/o3/alpha_cpu_impl.hh:
Rename AlphaFullCPU to AlphaO3CPU to differentiate from old FullCPU model.
src/cpu/o3/alpha_dyn_inst.hh:
src/cpu/o3/alpha_dyn_inst_impl.hh:
src/cpu/o3/alpha_impl.hh:
src/cpu/o3/alpha_params.hh:
src/cpu/o3/commit.hh:
src/cpu/o3/cpu.hh:
src/cpu/o3/decode.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/iew.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue.hh:
src/cpu/o3/lsq.hh:
src/cpu/o3/lsq_impl.hh:
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/regfile.hh:
src/cpu/o3/rename.hh:
src/cpu/o3/rename_impl.hh:
src/cpu/o3/rob.hh:
src/cpu/o3/rob_impl.hh:
src/cpu/o3/thread_state.hh:
src/python/m5/objects/AlphaO3CPU.py:
Rename FullCPU to O3CPU to differentiate from old FullCPU model.
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/lsq_unit_impl.hh:
Rename FullCPU to O3CPU to differentiate from old FullCPU model.
Also #ifdef the checker code so it doesn't need to be included if it's not selected.
--HG--
rename : src/cpu/checker/o3_cpu_builder.cc => src/cpu/checker/o3_builder.cc
rename : src/cpu/checker/cpu_builder.cc => src/cpu/checker/ozone_builder.cc
rename : src/python/m5/objects/AlphaFullCPU.py => src/python/m5/objects/AlphaO3CPU.py
extra : convert_revision : 86619baf257b8b7c8955efd447eba56e0d7acd6a
This is release m5_1.1 of the M5 simulator. This file contains brief "getting started" instructions. For more information, see http://m5.eecs.umich.edu. If you have questions, please send mail to m5sim-users@lists.sourceforge.net. WHAT'S INCLUDED (AND NOT) ------------------------- The basic source release includes these subdirectories: - m5: the simulator itself - m5-test: regression tests - ext: less-common external packages needed to build m5 - alpha-system: source for Alpha console and PALcode To run full-system simulations, you will need compiled console, PALcode, and kernel binaries and one or more disk images. These files are collected in a separate archive, m5_system_1.1.tar.bz2. This file is included on the CD release, or you can download it separately from Sourceforge. M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux and FreeBSD bootdisks, but we are unable to distribute bootable disk images of Tru64 Unix. If you have a Tru64 license and are interested in obtaining disk images, contact us at m5-dev@eecs.umich.edu. The CD release includes a few extra goodies, such as a tar file containing doxygen-generated HTML documentation (html-docs.tar.gz), a set of Linux source patches (linux_m5-2.6.8.1.diff), and the scons program needed to build M5. If you do not have the CD, the same HTML documentation is available online at http://m5.eecs.umich.edu/docs, the Linux source patches are available at http://m5.eecs.umich.edu/dist/linux_m5-2.6.8.1.diff, and the scons program is available from http://www.scons.org. WHAT'S NEEDED ------------- - GCC version 3.3 or newer - Python 2.3 or newer - SCons 0.96.1 or newer (see http://www.scons.org) WHAT'S RECOMMENDED ------------------ - MySQL (for statistics complex statistics storage/retrieval) - Python-MysqlDB (for statistics analysis) GETTING STARTED --------------- There are two different build targets and three optimizations levels: Target: ------- ALPHA_SE - Syscall emulation simulation ALPHA_FS - Full system simulation Optimization: ------------- m5.debug - debug version of the code with tracing and without optimization m5.opt - optimized version of code with tracing m5.fast - optimized version of the code without tracing and asserts Different targets are built in different subdirectories of m5/build. Binaries with the same target but different optimization levels share the same directory. Note that you can build m5 in any directory you choose;p just configure the target directory using the 'mkbuilddir' script in m5/build. The following steps will build and test the simulator. The variable "$top" refers to the top directory where you've unpacked the files, i.e., the one containing the m5, m5-test, and ext directories. If you have a multiprocessor system, you should give scons a "-j N" argument (like make) to run N jobs in parallel. To build and test the syscall-emulation simulator: cd $top/m5/build scons ALPHA_SE/test/opt/quick This process takes under 10 minutes on a dual 3GHz Xeon system (using the '-j 4' option). To build and test the full-system simulator: 1. Unpack the full-system binaries from m5_system_1.1.tar.bz2. (See above for directions on obtaining this file if you don't have it.) This package includes disk images and kernel, palcode, and console binaries for Linux and FreeBSD. 2. Edit the SYSTEMDIR search path in $top/m5-test/SysPaths.py to include the path to your local copy of the binaries. 3. In $top/m5/build, run "scons ALPHA_FS/test/opt/quick". This process also takes under 10 minutes on a dual 3GHz Xeon system (again using the '-j 4' option).