This reverts https://gem5-review.googlesource.com/c/public/gem5/+/65533 This is early version support RV32 instruction tests. We should directly set isa feature of RiscvCPU to run RV32 instruction not just choose Riscv32CPU Change-Id: I51b744e9d827adfabc2a7c222ab3801d454601d1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70097 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Bobby Bruce <bbruce@ucdavis.edu> Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>