Korey Sewell b3464ef180 support for unaligned memory access ...

arch/mips/isa/base.isa:
    disassembly fixes
arch/mips/isa/decoder.isa:
    support for unaligned loads/stores
arch/mips/isa_traits.hh:
    edit Syscall Reg values
arch/mips/linux_process.cc:
    call writevFunc on writev syscall

--HG--
extra : convert_revision : 4aea6d069bd7ba0e83b23d2d85c50d68532f0454

2006-03-19 13:40:03 -05:00

..

alpha

Merge m5.eecs.umich.edu:/bk/newmem

2006-03-16 14:08:31 -05:00

mips

support for unaligned memory access

2006-03-19 13:40:03 -05:00

sparc

Fixed a couple typos

2006-03-17 14:25:54 -05:00

isa_parser.py

Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.

2006-03-14 15:55:00 -05:00

isa_specific.hh

Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu

2006-03-14 18:28:51 -05:00

SConscript

Moved registerfile.hh to regfile.hh

2006-03-14 16:05:44 -05:00