Gabe Black b398b8ff1b Registers: Add a registers.hh file as an ISA switched header. ...

This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.

--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh

2009-07-08 23:02:21 -07:00

..

bare_iron

Get rid of 'using namespace' declarations in headers.

2009-03-05 17:15:31 -08:00

isa

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

linux

Get rid of 'using namespace' declarations in headers.

2009-03-05 17:15:31 -08:00

BISystem.py

fix MIPS headers

2007-11-15 14:21:01 -05:00

dsp.cc

gcc: Add extra parens to quell warnings.

2008-09-27 21:03:49 -07:00

dsp.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

dt_constants.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

faults.cc

Registers: Eliminate the ISA defined RegFile class.

2009-07-08 23:02:21 -07:00

faults.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

idle_event.cc

arch: TheISA shouldn't really ever be used in the arch directory.

2008-09-27 21:03:46 -07:00

idle_event.hh

fix MIPS headers

2007-11-15 14:21:01 -05:00

interrupts.cc

style: Use the correct m5 style for things relating to interrupts.

2008-10-21 07:12:53 -07:00

interrupts.hh

style: Use the correct m5 style for things relating to interrupts.

2008-10-21 07:12:53 -07:00

isa_traits.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

isa.cc

Registers: Collapse ARM and MIPS regfile directories.

2009-07-08 23:02:21 -07:00

isa.hh

Registers: Collapse ARM and MIPS regfile directories.

2009-07-08 23:02:21 -07:00

kernel_stats.hh

fix MIPS headers

2007-11-15 14:21:01 -05:00

locked_mem.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

microcode_rom.hh

CPU: Create a microcode ROM object in the CPU which is defined by the ISA.

2008-10-12 15:59:21 -07:00

mips_core_specific.cc

alpha: Get rid fo the namespace called EV5.

2008-09-27 21:03:45 -07:00

mips_core_specific.hh

move initCPU, processInterrupts declaration to core_specific file.

2007-11-16 21:31:37 -05:00

MipsCPU.py

Add in files from merge-bare-iron, get them compiling in FS and SE mode

2007-11-13 16:58:16 -05:00

MipsInterrupts.py

Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.

2008-10-12 09:09:56 -07:00

MipsSystem.py

Add in files from merge-bare-iron, get them compiling in FS and SE mode

2007-11-13 16:58:16 -05:00

MipsTLB.py

tlb: Don't separate the TLB classes into an instruction TLB and a data TLB

2009-04-08 22:21:27 -07:00

misc_regfile.cc

Registers: Collapse ARM and MIPS regfile directories.

2009-07-08 23:02:21 -07:00

misc_regfile.hh

Registers: Collapse ARM and MIPS regfile directories.

2009-07-08 23:02:21 -07:00

mmaped_ipr.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

mt_constants.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

mt.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

pagetable.cc

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

pagetable.hh

gcc: Add extra parens to quell warnings.

2008-09-27 21:03:49 -07:00

pra_constants.hh

Add in files from merge-bare-iron, get them compiling in FS and SE mode

2007-11-13 16:58:16 -05:00

predecoder.hh

types: Move stuff for global types into src/base/types.hh

2009-05-17 14:34:50 -07:00

process.cc

syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.

2009-04-21 08:17:36 -07:00

process.hh

Processes: Make getting and setting system call arguments part of a process object.

2009-02-27 09:22:14 -08:00

registers.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

remote_gdb.hh

fix MIPS headers

2007-11-15 14:21:01 -05:00

SConscript

Registers: Collapse ARM and MIPS regfile directories.

2009-07-08 23:02:21 -07:00

SConsopts

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

stacktrace.cc

arch: TheISA shouldn't really ever be used in the arch directory.

2008-09-27 21:03:46 -07:00

stacktrace.hh

arch: TheISA shouldn't really ever be used in the arch directory.

2008-09-27 21:03:46 -07:00

system.cc

alpha: Get rid fo the namespace called EV5.

2008-09-27 21:03:45 -07:00

system.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

tlb.cc

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

tlb.hh

tlb: More fixing of unified TLB

2009-04-08 22:21:27 -07:00

types.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

utility.cc

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

utility.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

vtophys.cc

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00

vtophys.hh

go back and fix up MIPS copyright headers

2007-11-16 21:32:22 -05:00