b1d7c8e77b4dda39f2e97e52182ff3f612055b11
Some CSR register is physically shared between different privilige level. Current implementation of CSR setting only considers to verify the bits visable in current privilige level, and directly writes the masked bits back to register. This leads to other bits invisable to current mode is overwritten and wrong behavior across the modes. Thus, CSR updating should always keep the bits value for other modes. e.g. disabling interrupt in S mode with setting SSTATUS SIE bit will lead to clear MIE bit as well (the interrupt is disabled unintentionally). All CSR register sharing same physical register in different mode may have similar issue. I only fixed some important ones. The fix is verified in FS. Jira Issue: https://gem5.atlassian.net/browse/GEM5-860 Change-Id: I34d4766a4b483b5add2c3bbefd28b21b9abf37f6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39036 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu> Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This is the gem5 simulator. The main website can be found at http://www.gem5.org A good starting point is http://www.gem5.org/about, and for more information about building the simulator and getting started please see http://www.gem5.org/documentation and http://www.gem5.org/documentation/learning_gem5/introduction. To build gem5, you will need the following software: g++ or clang, Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4, and lastly protobuf if you want trace capture and playback support. Please see http://www.gem5.org/documentation/general_docs/building for more details concerning the minimum versions of the aforementioned tools. Once you have all dependencies resolved, type 'scons build/<ARCH>/gem5.opt' where ARCH is one of ARM, NULL, MIPS, POWER, SPARC, or X86. This will build an optimized version of the gem5 binary (gem5.opt) for the the specified architecture. See http://www.gem5.org/documentation/general_docs/building for more details and options. The basic source release includes these subdirectories: - configs: example simulation configuration scripts - ext: less-common external packages needed to build gem5 - src: source code of the gem5 simulator - system: source for some optional system software for simulated systems - tests: regression tests - util: useful utility programs and files To run full-system simulations, you will need compiled system firmware (console and PALcode for Alpha), kernel binaries and one or more disk images. If you have questions, please send mail to gem5-users@gem5.org Enjoy using gem5 and please share your modifications and extensions.
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