cc4380b0d6
Move the name of the RegClass out of constants which belong to the RegId, and instead store them in the RegClass instances. Change-Id: I1ddd4bc8467d5e3f178db7a11c8f8052f43fd7ec Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50251 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
75 lines
2.9 KiB
C++
75 lines
2.9 KiB
C++
/*
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* Copyright (c) 2016-2017 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2013 Advanced Micro Devices, Inc.
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* All rights reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu/reg_class.hh"
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#include <sstream>
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#include "base/cprintf.hh"
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#include "sim/bufval.hh"
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#include "sim/byteswap.hh"
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namespace gem5
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{
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std::string
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RegClassOps::regName(const RegId &id) const
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{
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return csprintf("%s[%d]", id.className(), id.index());
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}
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std::string
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RegClassOps::valString(const void *val, size_t size) const
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{
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// If this is just a RegVal, or could be interpreted as one, print it
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// that way.
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auto [reg_val_str, reg_val_success] = printUintX(val, size, HostByteOrder);
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if (reg_val_success)
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return reg_val_str;
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// Otherwise, print it as a sequence of bytes. Use big endian order so
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// that the most significant bytes are printed first, like digits in a
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// regular number.
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return printByteBuf(val, size, ByteOrder::big);
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}
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} // namespace gem5
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