Daniel R. Carvalho af2d420b42 base-stats: Fix self addition bug in addStatGroup ...

A group cannot be added to itself; otherwise, it would
create a cyclic dependency.

Change-Id: I2e42f84814c675e8d5318cfda2d99b1b394758aa
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43011
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

2021-06-17 21:09:51 +00:00

..

arch

arch-arm: Remove the TLB::flush overload for TLBI IPA

2021-06-10 08:01:01 +00:00

base

base-stats: Fix self addition bug in addStatGroup

2021-06-17 21:09:51 +00:00

cpu

sim: Make SimObject inherit from Named

2021-06-17 21:09:51 +00:00

dev

dev-amdgpu: Handle framebuffer counter accesses

2021-06-11 17:10:32 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

base-stats,misc: Rename Stats namespace as statistics

2021-05-29 11:13:49 +00:00

kern

misc: Clean up ISA switching header includes.

2021-05-28 23:41:03 +00:00

learning_gem5

base-stats,misc: Rename Stats namespace as statistics

2021-05-29 11:13:49 +00:00

mem

sim,mem-ruby: Handle interleaved device memory

2021-06-14 15:48:51 +00:00

proto

python,scons: Move readCommand and compareVersions into site_scons.

2021-05-10 23:33:22 +00:00

python

sim: Remove SimObject dependency from serialize.hh

2021-06-16 10:50:26 +00:00

sim

sim: Remove SimObject dependency from Drainable

2021-06-17 21:09:51 +00:00

systemc

systemc: include <typeinfo>

2021-06-07 01:29:32 +00:00

Doxyfile

misc: Update version to "DEVELOP-FOR-V21.1"

2021-03-26 18:21:34 +00:00

SConscript

base: Add unit test for base/trace.hh

2021-06-16 10:50:26 +00:00