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a892af7b261e1c48b06ccbded5551e958c778414
gem5/src/cpu
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Korey Sewell a892af7b26 inorder: dont allow early loads 
- loads were happening on same cycle as the address was generated which is slightly
unrealistic. Instead, force address generation to be on separate cycle from load
initiation
- also, mark the stages in a more traditional way (F-D-X-M-W)
2010-01-31 18:25:27 -05:00
..
checker
Mem: Eliminate the NO_FAULT request flag.
2009-11-10 21:10:18 -08:00
inorder
inorder: dont allow early loads
2010-01-31 18:25:27 -05:00
memtest
python: Move more code into m5.util allow SCons to use that code.
2009-09-22 15:24:16 -07:00
o3
o3: get rid of unused physmem pointer
2009-11-04 14:23:25 -08:00
ozone
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
pred
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
rubytest
ruby: added the GEMS ruby tester
2010-01-29 20:29:23 -08:00
simple
m5: Fixed bug in atomic cpu destructor
2009-11-18 13:55:58 -08:00
trace
request: rename INST_READ to INST_FETCH.
2009-04-20 18:54:02 -07:00
activity.cc
o3cpu: give a name to the activity recorder for better tracing
2009-01-21 14:56:18 -08:00
activity.hh
o3cpu: give a name to the activity recorder for better tracing
2009-01-21 14:56:18 -08:00
base_dyn_inst_impl.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
base_dyn_inst.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
base.cc
commit Soumyaroop's bug catch about max_insts_all_threads
2009-09-29 18:03:10 -04:00
base.hh
since totalInstructions() is impl'ed by all the cpus, make it an abstract base class.
2010-01-12 10:22:46 -08:00
BaseCPU.py
POWER: Add support for the Power ISA
2009-10-27 09:24:39 -07:00
CheckerCPU.py
python: Move more code into m5.util allow SCons to use that code.
2009-09-22 15:24:16 -07:00
cpu_models.py
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
cpuevent.cc
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
2006-06-06 17:32:21 -04:00
cpuevent.hh
eventq: convert all usage of events to use the new API.
2008-10-09 04:58:24 -07:00
exec_context.hh
Registers: Get rid of the float register width parameter.
2009-07-08 23:02:20 -07:00
exetrace.cc
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
exetrace.hh
includes: sort includes again
2009-05-17 14:34:52 -07:00
ExeTracer.py
SimObjects: Clean up handling of C++ namespaces.
2008-10-09 22:19:39 -07:00
func_unit.cc
params: Deprecate old-style constructors; update most SimObject constructors.
2007-08-30 15:16:59 -04:00
func_unit.hh
params: Deprecate old-style constructors; update most SimObject constructors.
2007-08-30 15:16:59 -04:00
FuncUnit.py
Rename enum from OpType to OpClass so it's consistent with the
2007-06-11 23:10:58 -07:00
inst_seq.hh
build: fix compile problems pointed out by gcc 4.4
2009-11-04 16:57:01 -08:00
inteltrace.cc
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
inteltrace.hh
includes: sort includes again
2009-05-17 14:34:52 -07:00
IntelTrace.py
SimObjects: Clean up handling of C++ namespaces.
2008-10-09 22:19:39 -07:00
intr_control.cc
style: Use the correct m5 style for things relating to interrupts.
2008-10-21 07:12:53 -07:00
intr_control.hh
Interrupts: Inline some code and remove duplication.
2007-11-08 10:46:41 -05:00
IntrControl.py
Move SimObject python files alongside the C++ and fix
2007-05-27 19:21:17 -07:00
legiontrace.cc
build: fix compile problems pointed out by gcc 4.4
2009-11-04 16:57:01 -08:00
legiontrace.hh
includes: sort includes again
2009-05-17 14:34:52 -07:00
LegionTrace.py
SimObjects: Clean up handling of C++ namespaces.
2008-10-09 22:19:39 -07:00
m5legion_interface.h
add fsr to the list of registers we are interested in
2007-01-30 18:27:04 -05:00
nativetrace.cc
ARM: Make native trace print out what instruction caused an error.
2009-07-27 00:54:09 -07:00
nativetrace.hh
ARM: Make native trace print out what instruction caused an error.
2009-07-27 00:54:09 -07:00
NativeTrace.py
ARM: Make native trace print out what instruction caused an error.
2009-07-27 00:54:09 -07:00
op_class.hh
Major changes to how SimObjects are created and initialized. Almost all
2007-07-23 21:51:38 -07:00
pc_event.cc
debug: Move debug_break into src/base
2009-02-23 11:48:40 -08:00
pc_event.hh
types: Move stuff for global types into src/base/types.hh
2009-05-17 14:34:50 -07:00
profile.cc
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
2006-06-06 17:32:21 -04:00
profile.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
quiesce_event.cc
eventq: convert all usage of events to use the new API.
2008-10-09 04:58:24 -07:00
quiesce_event.hh
Make the Event::description() a const function
2008-02-06 16:32:40 -05:00
SConscript
O3: Add flag to control whether faulting instructions are traced.
2009-09-26 10:50:50 -07:00
simple_thread.cc
ISA: Fix compilation.
2009-10-17 01:13:41 -07:00
simple_thread.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
smt.hh
types: add a type for thread IDs and try to use it everywhere
2009-05-26 09:23:13 -07:00
static_inst.cc
inorder-tlb-cunit: merge the TLB as implicit to any memory access
2009-05-12 15:01:16 -04:00
static_inst.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
thread_context.cc
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
thread_context.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
thread_state.cc
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
2009-07-08 23:02:22 -07:00
thread_state.hh
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00