Tiago Mück a63ff3c442 mem-cache: add prefetcher listener for evictions ...

Listener to data update probe notifies prefetcher of evictions.
Prefetchers need to implement notifyEvict to make use of this
information.

Related JIRA:
https://gem5.atlassian.net/browse/GEM5-457
https://gem5.atlassian.net/browse/GEM5-1112

Change-Id: I052cfdeba1e40ede077554ada104522f6a0cb2c7
Signed-off-by: Tiago Mück <tiago.muck@arm.com>

2023-11-28 18:30:49 -06:00

..

arch

arch-riscv: Move insts/vector from header to source

2023-10-26 18:04:58 +08:00

base

scons: Explicit the config option HAVE_DEPRECATED_NAMESPACE type bool

2023-10-20 11:41:53 +08:00

cpu

cpu: Branch Predictor Refactoring (#455)

2023-10-26 09:15:11 +01:00

dev

arch-riscv: Add bootloader+kernel workload (#390)

2023-10-18 09:17:12 -07:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

gpu-compute: Update tokens for flat global/scratch (#408)

2023-10-11 09:00:10 -07:00

kern

misc: Fix buggy special path comparisons

2023-09-05 13:44:10 -07:00

learning_gem5

cpu: Explicitly define cache_line_size -> 64-bit unsigned int (#329)

2023-10-16 07:50:35 -07:00

mem

mem-cache: add prefetcher listener for evictions

2023-11-28 18:30:49 -06:00

proto

scons: Explicit the config option HAVE_PROTOBUF type boolean

2023-10-20 11:46:02 +08:00

python

arch-riscv: Add bootloader+kernel workload (#390)

2023-10-18 09:17:12 -07:00

sim

sim: Define an InstructionDisassembler SimObject

2023-10-20 09:27:50 +01:00

sst

mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner

2023-02-03 06:11:45 +00:00

systemc

misc: fix clang13 overloaded-virtual warning (#454)

2023-10-16 07:23:08 -07:00

Doxyfile

misc: Update version info for develop branch

2023-07-10 12:28:44 -07:00

SConscript

python: Add importer to standalone gem5py_m5

2023-09-28 11:22:33 -07:00