sim: Define an InstructionDisassembler SimObject

We want to be able to configure from python the disassembler
used by an instruction tracer. The default/base version will
reuse existing instruction logic and it will simply
call the StaticInst::disassemble method.

Change-Id: Ieb16f059a436757c5892dcc82882f6d42090927f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/sim/InstTracer.py

@@ -1,3 +1,15 @@
+# Copyright (c) 2023 Arm Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Copyright (c) 2007 The Regents of The University of Michigan
 # All rights reserved.
 #
@@ -28,8 +40,18 @@ from m5.SimObject import SimObject
 from m5.params import *
 
 
+class InstDisassembler(SimObject):
+    type = "InstDisassembler"
+    cxx_header = "sim/insttracer.hh"
+    cxx_class = "gem5::trace::InstDisassembler"
+
+
 class InstTracer(SimObject):
     type = "InstTracer"
     cxx_header = "sim/insttracer.hh"
     cxx_class = "gem5::trace::InstTracer"
     abstract = True
+
+    disassembler = Param.InstDisassembler(
+        InstDisassembler(), "Instruction Disassembler"
+    )

src/sim/SConscript

@@ -105,7 +105,7 @@ GTest('proxy_ptr.test', 'proxy_ptr.test.cc')
 GTest('serialize.test', 'serialize.test.cc', with_tag('gem5 serialize'))
 GTest('serialize_handlers.test', 'serialize_handlers.test.cc')
 
-SimObject('InstTracer.py', sim_objects=['InstTracer'])
+SimObject('InstTracer.py', sim_objects=['InstTracer', 'InstDisassembler'])
 SimObject('Process.py', sim_objects=['Process', 'EmulatedDriver'])
 Source('faults.cc')
 Source('process.cc')

src/sim/insttracer.hh

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, 2017, 2020 ARM Limited
+ * Copyright (c) 2014, 2017, 2020, 2023 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -48,6 +48,7 @@
 #include "cpu/inst_res.hh"
 #include "cpu/inst_seq.hh"
 #include "cpu/static_inst.hh"
+#include "params/InstTracer.hh"
 #include "sim/sim_object.hh"
 
 namespace gem5
@@ -286,10 +287,37 @@ class InstRecord
     bool getFaulting() const { return faulting; }
 };
 
+/**
+ * The base InstDisassembler class provides a one-API interface
+ * to disassemble the instruction passed as a first argument.
+ * It also provides a base implementation which is
+ * simply calling the StaticInst::disassemble method, which
+ * is the usual interface for disassembling
+ * a gem5 instruction.
+ */
+class InstDisassembler : public SimObject
+{
+  public:
+    InstDisassembler(const SimObjectParams &params)
+      : SimObject(params)
+    {}
+
+    virtual std::string
+    disassemble(StaticInstPtr inst,
+                const PCStateBase &pc,
+                const loader::SymbolTable *symtab) const
+    {
+        return inst->disassemble(pc.instAddr(), symtab);
+    }
+};
+
 class InstTracer : public SimObject
 {
   public:
-    InstTracer(const Params &p) : SimObject(p) {}
+    PARAMS(InstTracer);
+    InstTracer(const Params &p)
+      : SimObject(p), disassembler(p.disassembler)
+    {}
 
     virtual ~InstTracer() {}
 
@@ -297,6 +325,17 @@ class InstTracer : public SimObject
         getInstRecord(Tick when, ThreadContext *tc,
                 const StaticInstPtr staticInst, const PCStateBase &pc,
                 const StaticInstPtr macroStaticInst=nullptr) = 0;
+
+    std::string
+    disassemble(StaticInstPtr inst,
+                const PCStateBase &pc,
+                const loader::SymbolTable *symtab=nullptr) const
+    {
+        return disassembler->disassemble(inst, pc, symtab);
+    }
+
+  private:
+    InstDisassembler *disassembler;
 };
 
 } // namespace trace