gem5/src/cpu at a6246bb047a0527590519c35a5ffbd660c680991 - gem5

checker

Checker: Access workload element 0 only if there is an element 0.

2012-02-07 04:44:01 -08:00

inorder

Faults: Turn off arch/faults.hh

2012-02-07 04:43:21 -08:00

nocpu

SCons: Support building without an ISA

2010-11-19 18:00:39 -06:00

o3

Faults: Turn off arch/faults.hh

2012-02-07 04:43:21 -08:00

ozone

Faults: Turn off arch/faults.hh

2012-02-07 04:43:21 -08:00

pred

O3: Fix uninitialized variable in the tournament branch predictor.

2011-08-07 09:21:49 -07:00

simple

Faults: Turn off arch/faults.hh

2012-02-07 04:43:21 -08:00

testers

MEM: Separate queries for snooping and address ranges

2012-01-17 12:55:09 -06:00

trace

includes: sort all includes

2011-04-15 10:44:06 -07:00

activity.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

activity.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

base_dyn_inst_impl.hh

CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5

2012-01-31 07:46:03 -08:00

base_dyn_inst.hh

Faults: Turn off arch/faults.hh

2012-02-07 04:43:21 -08:00

base.cc

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

base.hh

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

BaseCPU.py

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

CheckerCPU.py

CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5

2012-01-31 07:46:03 -08:00

cpuevent.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

cpuevent.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

decode_cache.hh

Decode: Pull instruction decoding out of the StaticInst class into its own.

2011-09-09 02:30:01 -07:00

decode.cc

Decode: Pull instruction decoding out of the StaticInst class into its own.

2011-09-09 02:30:01 -07:00

decode.hh

Decode: Pull instruction decoding out of the StaticInst class into its own.

2011-09-09 02:30:01 -07:00

dummy_checker_builder.cc

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

DummyChecker.py

CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5

2012-01-31 07:46:03 -08:00

exec_context.hh

SE/FS: Expose the same methods on the CPUs in SE and FS modes.

2011-11-01 04:01:13 -07:00

exetrace.cc

SE/FS: Get rid of FULL_SYSTEM in the CPU directory.

2011-11-18 01:33:28 -08:00

exetrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

ExeTracer.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

func_unit.cc

params: Deprecate old-style constructors; update most SimObject constructors.

2007-08-30 15:16:59 -04:00

func_unit.hh

clang: Enable compiling gem5 using clang 2.9 and 3.0

2012-01-31 12:05:52 -05:00

FuncUnit.py

CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.

2010-11-15 14:04:04 -06:00

inst_seq.hh

build: fix compile problems pointed out by gcc 4.4

2009-11-04 16:57:01 -08:00

inteltrace.cc

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

inteltrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

IntelTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

intr_control.cc

SE/FS: Get rid of FULL_SYSTEM in the CPU directory.

2011-11-18 01:33:28 -08:00

intr_control.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

IntrControl.py

Move SimObject python files alongside the C++ and fix

2007-05-27 19:21:17 -07:00

legiontrace.cc

Merge with main repository.

2012-01-07 02:10:34 -08:00

legiontrace.hh

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

LegionTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

m5legion_interface.h

add fsr to the list of registers we are interested in

2007-01-30 18:27:04 -05:00

nativetrace.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

nativetrace.hh

clang: Enable compiling gem5 using clang 2.9 and 3.0

2012-01-31 12:05:52 -05:00

NativeTrace.py

ARM: Make native trace print out what instruction caused an error.

2009-07-27 00:54:09 -07:00

op_class.hh

CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.

2010-11-15 14:04:04 -06:00

pc_event.cc

Merge yet again with the main repository.

2012-01-16 04:27:10 -08:00

pc_event.hh

types: Move stuff for global types into src/base/types.hh

2009-05-17 14:34:50 -07:00

profile.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

profile.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

quiesce_event.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

quiesce_event.hh

clang: Enable compiling gem5 using clang 2.9 and 3.0

2012-01-31 12:05:52 -05:00

SConscript

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

simple_thread.cc

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

simple_thread.hh

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

smt.hh

includes: fix up code after sorting

2011-04-15 10:44:14 -07:00

static_inst_fwd.hh

StaticInst: Merge StaticInst and StaticInstBase.

2011-09-09 02:40:11 -07:00

static_inst.cc

Decode: Pull instruction decoding out of the StaticInst class into its own.

2011-09-09 02:30:01 -07:00

static_inst.hh

clang: Enable compiling gem5 using clang 2.9 and 3.0

2012-01-31 12:05:52 -05:00

thread_context.cc

SE/FS: Make the functions available from the TC consistent between SE and FS.

2011-10-31 02:58:22 -07:00

thread_context.hh

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

thread_state.cc

Implement Ali's review feedback.

2012-01-29 02:04:34 -08:00

thread_state.hh

Merge with head, hopefully the last time for this batch.

2012-01-31 22:40:08 -08:00

timebuf.hh

Move sched_list.hh and timebuf.hh from src/base to src/cpu.

2011-01-03 14:35:47 -08:00

translation.hh

Translation: Use a pointer type as the template argument.

2011-08-07 09:21:48 -07:00