Jordi Vaquero a5b3a36bf3 arch-arm: Fix Trap to EL1 on register DC CVAU ...

Change-Id: I8add9fc8595bb1ac0a7de9778bd4544a01b94ee4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31774
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-07-24 12:04:12 +00:00

..

arm

arch-arm: Fix Trap to EL1 on register DC CVAU

2020-07-24 12:04:12 +00:00

gcn3

arch-gcn3,gpu-compute: Fix GCN3 related compiler errors

2020-07-20 14:53:13 +00:00

generic

sim: Retrofit the VPtr type.

2020-07-04 17:53:54 +00:00

mips

base,arch: Fixed usage of bitfield::replaceBits

2020-07-22 05:17:33 +00:00

null

arch: Delete authors lists from the null arch files.

2020-02-18 03:35:12 +00:00

power

arch,cpu: Consolidate most of the StackTrace classes into a base class.

2020-07-11 00:24:38 +00:00

riscv

arch,cpu: Consolidate most of the StackTrace classes into a base class.

2020-07-11 00:24:38 +00:00

sparc

arch,sim,misc: Add a new m5 op "sum" which just sums its inputs.

2020-07-24 03:59:49 +00:00

x86

arch,sim,misc: Add a new m5 op "sum" which just sums its inputs.

2020-07-24 03:59:49 +00:00

isa_parser.py

arch: list.sort() sorting by key only in python3

2020-03-13 14:24:07 +00:00

micro_asm_test.py

arch: Delete authors lists from generic arch files.

2020-02-18 03:34:56 +00:00

micro_asm.py

misc: Make exception handling python3 compliant

2020-03-13 14:24:07 +00:00

SConscript

arch,cpu,sim: Eliminate the now empty kernel statistics classes.

2020-06-17 19:54:41 +00:00