Giacomo Travaglini a1cf1c6c37 dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin ...

Change-Id: I7318b9186cd81f948211e8a955dab7eea6d2a2f5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31936
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-07-30 15:44:23 +00:00

..

arch

fastmodel: Implement GIC DTB auto-generation.

2020-07-29 08:10:37 +00:00

base

base,scons: -wno-deprecated-copy added for hdf5.cc with GCC

2020-07-29 00:35:00 +00:00

cpu

cpu: differentiate snoop DPRINTF messages for AtomicSimpleCPU

2020-07-23 10:00:40 +00:00

dev

dev-arm: Make AmbaInt/DmaDevice use the ArmInterruptPin

2020-07-30 15:44:23 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

misc,sim: Tagged API methods in sim/simobject.hh

2020-05-19 21:58:24 +00:00

gpu-compute

arch-gcn3,gpu-compute: Fix GCN3 related compiler errors

2020-07-20 14:53:13 +00:00

kern

arch,cpu,sim: Eliminate the now empty kernel statistics classes.

2020-06-17 19:54:41 +00:00

learning_gem5

misc: Make many includes explicit.

2020-06-03 19:42:46 +00:00

mem

sim: Move checkpoint parameters for ptable into seperate section

2020-07-30 07:12:00 +00:00

proto

misc: Use the protobuf version to choose between ByteSize(Long).

2020-04-29 21:46:11 +00:00

python

stats: add --stats-root option to dump only under some SimObjects

2020-07-01 13:22:52 +00:00

sim

arch,sim,misc: Add a new m5 op "sum" which just sums its inputs.

2020-07-24 03:59:49 +00:00

systemc

systemc: Fix systemc array bound error

2020-07-22 20:10:09 +00:00

unittest

arch,base,cpu,kerm,sim: Build a symbol table for object files.

2020-06-09 23:37:29 +00:00

Doxyfile

misc: Reverting version numbers

2020-07-03 20:59:44 -07:00

SConscript

scons: Add MARSHAL_XXFLAGS_EXTRA for the marshal object

2020-06-22 09:08:42 +00:00