Giacomo Travaglini 96c0f29b98 arch-arm: Do not use _flushMva for TLBI IPA ...

This is just a cosmetic change

Change-Id: If9ea1114ed7e20d5c952f401935532cf3335c501
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35246
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-11-03 09:55:37 +00:00

..

arm

arch-arm: Do not use _flushMva for TLBI IPA

2020-11-03 09:55:37 +00:00

gcn3

misc: Replace enable_if<>::type with enable_if_t<>.

2020-10-23 12:59:59 +00:00

generic

arch: Move many of the generic files outside an NULL guard.

2020-10-29 20:23:35 +00:00

isa_parser

arch: Clean up the __init__s in (Sub)OperandList.

2020-11-03 07:07:52 +00:00

mips

misc: Delete the now unnecessary create methods.

2020-10-30 04:00:20 +00:00

null

base, sim, mem, arch: Remove the dummy CPU in NULL

2020-09-14 08:52:40 +00:00

power

misc: Delete the now unnecessary create methods.

2020-10-30 04:00:20 +00:00

riscv

misc: Delete the now unnecessary create methods.

2020-10-30 04:00:20 +00:00

sparc

misc: Delete the now unnecessary create methods.

2020-10-30 04:00:20 +00:00

x86

arch-x86: Make CPUID vendor string a param

2020-11-02 18:17:41 +00:00

micro_asm_test.py

arch: Delete authors lists from generic arch files.

2020-02-18 03:34:56 +00:00

micro_asm.py

misc: Make exception handling python3 compliant

2020-03-13 14:24:07 +00:00

SConscript

arch,sim: Handle KVM SE page faults with workload events.

2020-10-29 20:23:26 +00:00