Andreas Hansson 921490a060 sim: Fatal if a clocked object is set to have a clock of 0 ...

This patch adds a check to the clocked object constructor to ensure it
is not configured to have a clock period of 0.

2013-01-07 13:05:39 -05:00

..

prefetch

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

tags

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

base.cc

sim: Fatal if a clocked object is set to have a clock of 0

2013-01-07 13:05:39 -05:00

base.hh

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

BaseCache.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

blk.cc

Fix #include lines for renamed cache files.

2008-02-10 14:45:25 -08:00

blk.hh

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

builder.cc

Cache: add a response latency to the caches

2012-09-25 11:49:41 -05:00

cache_impl.hh

cache: add note about where conflicts are handled

2013-01-07 13:05:32 -05:00

cache.cc

remove the totally obsolete split cache

2008-10-23 16:11:28 -04:00

cache.hh

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

mshr_queue.cc

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

mshr_queue.hh

mem: Add support for writing back and flushing caches

2012-11-02 11:32:02 -05:00

mshr.cc

Fix: Address a few benign memory leaks

2012-07-09 12:35:30 -04:00

mshr.hh

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

SConscript

scons: rename TraceFlags to DebugFlags

2011-06-02 17:36:21 -07:00