cache: add note about where conflicts are handled
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5
src/mem/cache/cache_impl.hh
vendored
5
src/mem/cache/cache_impl.hh
vendored
@@ -520,7 +520,10 @@ Cache<TagStore>::timingAccess(PacketPtr pkt)
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MSHR *mshr = mshrQueue.findMatch(blk_addr);
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if (mshr) {
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// MSHR hit
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/// MSHR hit
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/// @note writebacks will be checked in getNextMSHR()
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/// for any conflicting requests to the same block
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//@todo remove hw_pf here
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assert(pkt->req->masterId() < system->maxMasters());
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mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
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