This adds byte order as an attribute for PC state by introducing a new PCState class. The decoder can now fetch instructions bytes in the specified byte order in preparation for multi-mode support. Change-Id: I917333df88114a733cc5a8077cc420d5328f608b Signed-off-by: Sandipan Das <sandipan@linux.ibm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40940 Reviewed-by: Boris Shingarov <shingarov@labware.com> Maintainer: Boris Shingarov <shingarov@labware.com> Tested-by: kokoro <noreply+kokoro@google.com>
81 lines
2.3 KiB
C++
81 lines
2.3 KiB
C++
/*
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* Copyright (c) 2009 The University of Edinburgh
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_POWER_PCSTATE_HH__
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#define __ARCH_POWER_PCSTATE_HH__
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#include "arch/generic/types.hh"
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#include "arch/power/types.hh"
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#include "enums/ByteOrder.hh"
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namespace gem5
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{
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namespace PowerISA
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{
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class PCState : public GenericISA::SimplePCState<4>
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{
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private:
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typedef GenericISA::SimplePCState<4> Base;
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ByteOrder guestByteOrder = ByteOrder::big;
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public:
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PCState()
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{}
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void
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set(Addr val)
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{
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Base::set(val);
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npc(val + 4);
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}
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PCState(Addr val)
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{
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set(val);
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}
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ByteOrder
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byteOrder() const
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{
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return guestByteOrder;
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}
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void
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byteOrder(ByteOrder order)
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{
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guestByteOrder = order;
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}
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};
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} // namespace PowerISA
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} // namespace gem5
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#endif // __ARCH_POWER_PCSTATE_HH__
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