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8b4796a367ec21d294f7318343e5bb9d7e07a53e
gem5
/
src
/
cpu
/
o3
/
mips
History
Korey Sewell
d09ab2bd22
add thread id to misc. reg functions
...
--HG-- extra : convert_revision : 35d073d1279947d943a0290832e09a5268dd0b76
2007-11-15 20:35:49 -05:00
..
cpu_builder.cc
Fix problem with tracer not being initialized.
2007-07-30 13:13:11 -07:00
cpu_impl.hh
X86: Fix argument register indexing.
2007-07-26 22:13:14 -07:00
cpu.cc
This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world
2006-07-23 13:39:42 -04:00
cpu.hh
Move the "translate" member functions back into the base o3 class.
2007-08-13 16:01:09 -07:00
dyn_inst_impl.hh
Add extra constructors to Alpha and MIPS
2007-04-15 21:51:05 +00:00
dyn_inst.cc
This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world
2006-07-23 13:39:42 -04:00
dyn_inst.hh
add thread id to misc. reg functions
2007-11-15 20:35:49 -05:00
impl.hh
This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world
2006-07-23 13:39:42 -04:00
params.hh
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
2007-08-26 20:24:18 -07:00
thread_context.cc
This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world
2006-07-23 13:39:42 -04:00
thread_context.hh
Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class.
2006-08-11 19:43:10 -04:00