Files
gem5/src/dev/riscv/hifive.hh
Peter 69eb60d87e arch-riscv: RISC-V HiFive Platform implementation
This patch implements the RISC-V HiFive Platform
(based on the SiFive HiFive series). The HiFive
platform requires a PLIC and CLINT device (based on
current HiFive boards).

The optional uart_int_id field redirects Console interrupts
to the PLIC interrupt controller.

PlicDevice is a wrapper around BasicPioDevice that
requires an interrupt ID. Interrupts are expected to
be raised via platform->postPciInterrupt(id).

VirtIOMMIO is a slight modification from the ARM
implementation such that interrupts are posted through
PLIC

PlicDevice is a wrapper around BasicPioDevice that
requires an interrupt ID. Interrupts are expected to
be raised via platform->postPciInterrupt(id).

VirtIOMMIO is a slight modification from the ARM
implementation such that interrupts are posted through
PLIC.

Uart8250 was modified slightly for easier Python
setup.

Change-Id: I4bbdb5f903b52a41d1b7e0ccc44877c46cd30d56
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40599
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-02-23 03:43:47 +00:00

74 lines
2.8 KiB
C++

/*
* Copyright (c) 2021 Huawei International
* All rights reserved
*
* The license below extends only to copyright in the software and shall
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* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
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*
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#ifndef __DEV_RISCV_HIFIVE_HH__
#define __DEV_RISCV_HIFIVE_HH__
#include "dev/platform.hh"
#include "dev/riscv/clint.hh"
#include "dev/riscv/plic.hh"
#include "params/HiFive.hh"
using namespace RiscvISA;
class HiFive : public Platform {
public:
System *system;
Clint *clint;
Plic *plic;
int uartIntID;
public:
typedef HiFiveParams Params;
HiFive(const Params &params);
void postConsoleInt() override;
void clearConsoleInt() override;
void postPciInt(int line) override;
void clearPciInt(int line) override;
virtual Addr pciToDma(Addr pciAddr) const;
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
};
#endif // __DEV_RISCV_HIFIVE_HH__