Bobby R. Bruce bd6e1fc9c5 arch-riscv,misc: Add missing overrides for clang compilation ...

The Clang compiler returns "missing override" errors without these.

Change-Id: I62af6c338b000123c924f0b3205551579bd5aeb4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41913
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

2021-02-26 18:59:30 +00:00

..

clint.cc

arch-riscv: Implementation of CLINT

2021-02-23 03:43:47 +00:00

clint.hh

arch-riscv,misc: Add missing overrides for clang compilation

2021-02-26 18:59:30 +00:00

Clint.py

arch-riscv: Implementation of CLINT

2021-02-23 03:43:47 +00:00

hifive.cc

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

hifive.hh

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

HiFive.py

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

plic_device.cc

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

plic_device.hh

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

plic.cc

arch-riscv: PLIC Implementation

2021-02-23 03:43:47 +00:00

plic.hh

arch-riscv: PLIC Implementation

2021-02-23 03:43:47 +00:00

Plic.py

arch-riscv: PLIC Implementation

2021-02-23 03:43:47 +00:00

PlicDevice.py

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

rtc.cc

arch-riscv: Implementation of CLINT

2021-02-23 03:43:47 +00:00

rtc.hh

arch-riscv,misc: Add missing overrides for clang compilation

2021-02-26 18:59:30 +00:00

RTC.py

arch-riscv: Implementation of CLINT

2021-02-23 03:43:47 +00:00

SConscript

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

vio_mmio.cc

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

vio_mmio.hh

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00

VirtIOMMIO.py

arch-riscv: RISC-V HiFive Platform implementation

2021-02-23 03:43:47 +00:00