Andreas Sandberg 89530735d1 config: Clean up core timing model discovery ...

Instead of hard-coding timing models in CpuConfig.py, use
introspection to find them in the cores.arm model package.

Change-Id: I6642dc9cbc3f5beeeec748e716c9426c233d51ea
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3944
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

2017-07-03 09:47:19 +00:00

..

boot

rcs scripts: remove bbench.rcS

2013-04-02 12:46:49 -04:00

common

config: Clean up core timing model discovery

2017-07-03 09:47:19 +00:00

dist

config: Refactor the network switch configuration file

2017-02-14 15:09:18 -06:00

dram

mem: Update DRAM configuration names

2017-02-14 15:09:18 -06:00

example

config: Move core timing models to config/common/cores

2017-07-03 09:47:19 +00:00

learning_gem5

configs: fixed SimpleOpts missing error by adding library path

2017-06-15 20:57:03 +00:00

network

config: Fix up some configs to not use CPU aliases.

2017-05-09 16:48:30 +00:00

ruby

ruby, arm: Forward invalidations to the local exclusive monitor

2017-06-13 15:53:44 +00:00

splash2

syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

2016-11-09 14:27:40 -06:00

topologies

ruby: Fix regressions and make Ruby configs Python packages

2016-10-13 03:17:19 -04:00