Harshil Patel c66862f6e3 arch-riscv: fix riscv matched board for se mode (#677)

2023-12-13 13:16:08 -08:00

..

gem5

arch-riscv: fix riscv matched board for se mode (#677)

2023-12-13 13:16:08 -08:00

m5

misc, stdlib: Update documentation to adhere to RST formatting. (#631)

2023-12-01 11:43:49 -08:00

pybind11

sim,python: add activate option and method

2023-05-16 09:02:38 +00:00

embedded.cc

python: Remove python/embedded.cc's dependence on the rest of gem5.

2021-12-08 08:01:23 +00:00

embedded.hh

python,sim,util: Move EmbeddedPython into it's own file.

2021-12-08 08:01:23 +00:00

gem5_default_config.py

stdlib: Change default gem5-resources DB collection

2023-07-07 19:51:59 +00:00

gem5py_m5.cc

python: Add importer to standalone gem5py_m5

2023-09-28 11:22:33 -07:00

gem5py.cc

sim,python: follow the new CPython startup sequence

2023-07-10 23:00:31 +00:00

importer.cc

python: Replace PYBIND11_EMBEDDED_MODULE with GEM5_PYBIND_MODULE_INIT.

2021-12-16 01:57:26 +00:00

importer.py

python: Enable -m switch on gem5 binary (#453)

2023-10-14 20:08:06 -07:00

pybind_init.hh

python: Add a mechanism for installing pybind modules.

2021-12-16 01:57:26 +00:00

SConscript

Add feature to output citations automatically based on configuration (#90)

2023-07-17 10:41:51 -07:00