Giacomo Travaglini 74305fad32 arch-arm: ERET from AArch64 to AArch32 ignore MSBs ...

The 32 most significant bits of ELR_ELx must be ignored when returning
from AArch64 to AArch32.

Change-Id: I412d72908997916404e16e9eeca2789a9c529e58
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8881
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

2018-03-14 10:33:48 +00:00

..

arch

arch-arm: ERET from AArch64 to AArch32 ignore MSBs

2018-03-14 10:33:48 +00:00

base

sim: Make Stats truly non-copy-constructible

2018-02-13 16:47:44 +00:00

cpu

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

dev

dev: Don't fall through into BRAR after RFDR case

2018-03-06 19:45:34 +00:00

doc

sim: Adding support for power models

2016-06-06 17:16:44 +01:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

tarch, mem: Abstract the data stored in the SE page tables.

2018-01-23 20:39:17 +00:00

kern

misc: Updates for gcc7.2 for x86

2017-12-14 00:27:59 +00:00

learning_gem5/part2

learning-gem5: Fix missing misc.hh in hello_object.cc

2017-12-05 21:22:37 +00:00

mem

mem-ruby: Fix RubyPrefetcher support in MESI_Two_Level

2018-03-12 12:01:38 +00:00

proto

misc: Rename misc.(hh|cc) to logging.(hh|cc)

2017-12-04 23:10:55 +00:00

python

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

sim

sim, power: Temperature used for power calculations

2018-02-28 21:56:08 +00:00

unittest

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

Doxyfile

Doxygen: Update the version of the Doxyfile

2012-10-11 06:38:42 -04:00

SConscript

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00