Daniel R. Carvalho 6d1e9ee7c5 mem-cache: Workaround for setWhenReady assertion ...

Change 174da8e2da added an assert that
is not satisfiable with current implementation, breaking some
regression tests.

Change-Id: Ibafaf0c51906384364f0b2a4b931f8ec6126d858
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/14955
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

2018-12-07 11:16:43 +00:00

..

arch

arch-x86: Add sys/syscall.h to x86 process.cc/syscall_emul.cc

2018-12-05 16:18:54 +00:00

base

base: Ported circlebuf to CircularQueue

2018-12-06 15:30:27 +00:00

cpu

base, sim: Add missing destructors

2018-12-04 10:02:29 +00:00

dev

dev: Remove using namespace TheISA in uart8250.cc.

2018-10-17 20:18:29 +00:00

doc

docs: Fix power model doxygen

2018-04-20 15:59:35 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.

2018-11-27 21:58:24 +00:00

kern

sim-se: Add /sys/devices/system/cpu/online file

2018-03-15 20:45:34 +00:00

learning_gem5

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

mem

mem-cache: Workaround for setWhenReady assertion

2018-12-07 11:16:43 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

sim: Fix data type of ticks per second before passing it to C++

2018-11-16 22:04:15 +00:00

sim

arch-x86: Add sys/syscall.h to x86 process.cc/syscall_emul.cc

2018-12-05 16:18:54 +00:00

systemc

systemc: Disable systemc when using gcc versions older than 5.0.

2018-11-30 11:00:50 +00:00

unittest

tests: Convert IniFile unit test to a GTest

2018-11-28 09:54:16 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Generalize building binaries.

2018-06-26 00:15:12 +00:00