Kevin Lim c0f21b09c8 Fixes for MIPS_SE compiling. Regressions seem to work, but Korey should make sure these changes (commit especially) work okay. ...

src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Fixes for MIPS_SE compile.

--HG--
extra : convert_revision : fde9616f8e72b397c5ca965774172372cff53790

2006-12-02 13:33:46 -05:00

..

checker

Put kernel_stats back into arch.

2006-11-07 22:34:34 -05:00

memtest

Make CPU models signal to update the snoop ranges

2006-11-13 18:51:16 -05:00

o3

Fixes for MIPS_SE compiling. Regressions seem to work, but Korey should make sure these changes (commit especially) work okay.

2006-12-02 13:33:46 -05:00

ozone

Fix typo.

2006-11-12 23:31:29 -05:00

simple

Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.

2006-11-29 16:07:55 -05:00

trace

Move main control from C++ into Python.

2006-06-09 23:01:31 -04:00

activity.cc

Update copyright.

2006-06-07 16:02:55 -04:00

activity.hh

Update copyright.

2006-06-07 16:02:55 -04:00

base_dyn_inst_impl.hh

Add in support for LL/SC in the O3 CPU. Needs to be fully tested.

2006-10-23 14:00:07 -04:00

base_dyn_inst.hh

Add in support for LL/SC in the O3 CPU. Needs to be fully tested.

2006-10-23 14:00:07 -04:00

base.cc

Make cpu's capable of having a phase shift

2006-11-14 01:10:36 -05:00

base.hh

Make cpu's capable of having a phase shift

2006-11-14 01:10:36 -05:00

cpu_models.py

Use O3DynInst in cpu_models.py and in static_inst_exec_sigs.hh instead of a specific ISA dyn. inst.

2006-07-06 12:18:55 -04:00

cpuevent.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

cpuevent.hh

The tc needs to be protected instead of private so that the CpuEventWrapper can access it.

2006-11-03 11:05:56 -05:00

exec_context.hh

Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults

2006-11-01 16:44:45 -05:00

exetrace.cc

Certain header files should only be used in FS.

2006-11-11 07:15:16 -05:00

exetrace.hh

add code to operate in lockstep with legion

2006-11-07 15:51:37 -05:00

func_unit.cc

Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory.

2006-06-16 17:52:15 -04:00

func_unit.hh

Reorganization to move FuncUnit, FUDesc, and OpDesc out of the encumbered directory and into the normal cpu directory.

2006-06-16 17:52:15 -04:00

inst_seq.hh

fixes so that M5 will compile under solaris

2006-11-04 21:41:01 -05:00

intr_control.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

intr_control.hh

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

m5legion_interface.h

fix endian issues with condition codes

2006-11-10 20:17:42 -05:00

op_class.cc

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

op_class.hh

Merge ktlim@zizzer:/bk/newmem

2006-06-02 18:19:50 -04:00

pc_event.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

pc_event.hh

Added sim/host.hh for the Addr type.

2006-11-07 05:42:15 -05:00

profile.cc

Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

2006-06-06 17:32:21 -04:00

profile.hh

Put the ProcessInfo and StackTrace objects into the ISA namespaces.

2006-11-08 00:52:04 -05:00

quiesce_event.cc

Add Quiesce trace flag to track CPU quiesce/wakeup events.

2006-10-21 23:32:14 -07:00

quiesce_event.hh

Update copyright.

2006-06-07 16:02:55 -04:00

SConscript

Update the Memtester, commit a config file/test for it.

2006-10-09 00:26:10 -04:00

simple_thread.cc

Update Virtual and Physical ports.

2006-11-19 17:43:03 -05:00

simple_thread.hh

Update Virtual and Physical ports.

2006-11-19 17:43:03 -05:00

smt.hh

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

static_inst.cc

StaticInst support for microcode

2006-10-12 17:32:02 -04:00

static_inst.hh

StaticInst support for microcode

2006-10-12 17:32:02 -04:00

thread_context.hh

Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.

2006-11-29 16:07:55 -05:00

thread_state.cc

Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.

2006-11-29 16:07:55 -05:00

thread_state.hh

Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in.

2006-11-29 16:07:55 -05:00